• Ultrasound - AD9512/AD9272

    Hi,

    I'm prototyping an ultrasound scanner based on AD9272 and I've got some

    problems/questions. First, I would like to tell you some details about my project:

    1) HV TX circuitry is not assembled yet on my PCB, it will be the next step on…

  • AD9512 Phase setting not working

    We have a problem setting up the AD9512. We have set to clock divider to 5, and
    should therefore be able to change the phase delay to 0,1,2,3,4.
    But we can’t see any changes at all when scoping this.
    Schematics and SW setup is attached…
  • AD9512 Clock Divider Comms Problem

    Hello,

    I have prototyped an AD9512 on a double layer PCB before it's integrated into an existing project. The schematic & layout are as follows:

    The device powers on with no problem. I'm using an explorer16 pic dev kit to write to the chip…

  • AD9512 evaluation software and windows 7 64bit compatibleissues

    The AD9512 evaluation software CD that came with the kit is not windows 7 64bit
    compatible. Is there any SW update for Win 7 64 bit compatibility

     

    64-bit compatible software can be downloaded at:
    ftp://ftp.analog.com/pub/CSS/Software…
  • ad9512时钟芯片无输出

      调试AD9512,差分输入正常,每路均无输出(为LVDS/LVPECL电平信号),使用SDIO读寄存器,和默认值一致,使用SDIO写寄存器关断输出,可将输出电平信号关断。但是无论设置是否BYPASS都没有输出

  • AD9512 evaluation board and  Windows 7, 64 Bit driver issues

    After installed the Software (enclosed CD and latest version on Analog Devices
    website) for the AD9512 evaluation board on Windows 7, 64 Bit. After connecting
    the evaluation board to the computer via usb, the correct driver can not be
  • QUESTION about AD9512's DSYNC and DSYNCB pins connection

    When i just need one AD9512 as clock distribution IC.How should i handle the DSYNC and DSYNCB pins' connection?Leave it unconnection or connect it to ground with a 0.1uF capacitor?

  • Minimum slew rate for AD9512 clock signal (sine wave)?

    Hello to all,

    the datasheet of the AD9512 do not specify a minimum slew rate requirement for the clock inputs. But unfortunately the circuit on my bench shows a dramatic increase in jitter (about 15ns absolute @ 500ns period length) when the input slew…

  • RE: 100 Mhz LVCMOS clock signal smooth phase shift

    It seems ad9512/13/14 could be the chipest solution of this problem. I will check.

  • RE: LVDS and LVCMOS output clock in phase

    I actually landed on the AD9512 also after posting my message after a bit of further research