• AD9511: Programming the device in RESET

    Q 

    While the device is in RESET is it possible to program any register to any
    value other than the default ?

     

    A 

    It is not possible to program the AD9511 while it is in RESET state. This is
    because the RESETB pin (or the soft-reset bit) initiates…

  • AD9511 with CVHD-950 VCXO

    We're designig a product that requires both a very good frequency stability and a very low phase noise and jitter as we need to clock a 14 bit 170Msps ADC (an AD9643), an AD9707 DAC and get a reference for an ADF4351 synthesizer.

    We're going to…

  • Weird problem with AD9511 at power on

    We have implemented a radio receiver that uses an AD9643 as ADC connected to a Zynq SoC using axi-adc HDL core and corresponding drivers. The ADC is clocked by an AD9511 which is connected to two oscillators. The main reference comes from a 24.576 high…

  • AD9511BCPZ SPI通信有没有例程代码，C语言版本的？

    最近在使用AD9511时，使用的主控芯片为stm32f4,用SPI2控制 AD9511，不管怎么样弄都控制不了AD9511，我想问下你们有没有类似的例程，别说官方的开发板，那都是上位机演示用的，没有任何帮助？

  • Please tell me the practicable range of the AD9634 LVDS interface.

    I read AD9634 datasheet.

    In Figure 55. Differential LVDS Sample Clock (Up to 625 MHz), AD9634 is recever and AD9511 driver.

    AD9511 Differential Output Voltage 250mV - 450mV.

    AD9634 Differential clock input 300mV - 3.6V.

    When AD9511 output 250mV, would…

  • Eval board software

    I have an old eval board and wanted to know if there have been any updates to the software.  Where can I get a copy of your latest EVB software for the AD9511?

  • RE: AD9231, AD9573

    DougI said:
    My reading of the AD9573 datasheet indicates that the 100M output is fixed at 100MHz (not adjustable), which is too high for AD9231.

    On page 7 the datasheet indicates that the max. Input Clock Rate for the AD9231 is 625MHz. Why should the 100MHz…

  • AD951x: REFIN & CLK levels and FAQ "how to treat unused pins"

    Q 

    I am using AD9510, AD9511, AD9512 and AD9951. I would like to ask the following:

    1) About CLK1, CLK2, REFIN inputs in AD951x and REFCLK input in AD9951, do they
    accept both sinusoidal and square signals, like LVPECL?

    2) Which is the…

  • AD9707 outputs nothing

    Hello,

    We're having some trouble with an AD9707. We're clocking it at 122.88MHz from a LVPECL output of an AD9511 that should meet differential clock level specifications of AD9707 and we've checked that it does. We're using a ramp generator as data…

  • RE: ADF4355-2 close-in frequency independent spur problem

    Yes there is a way, the clock distributor is outputting LVPECL 1600mV and it can be increased to LVPECL 2000mV. Will try it. That is for ADF4355 references, which are LVPECL differential AC-coupled.

    I have tried to sniff the PCB with a crude DIY E-field…