Q
While the device is in RESET is it possible to program any register to anyvalue other than the default ?
A
It is not possible to program the AD9511 while it is in RESET state. This isbecause the RESETB pin (or the soft-reset bit) initiates…
We're designig a product that requires both a very good frequency stability and a very low phase noise and jitter as we need to clock a 14 bit 170Msps ADC (an AD9643), an AD9707 DAC and get a reference for an ADF4351 synthesizer.
We're going to…
We have implemented a radio receiver that uses an AD9643 as ADC connected to a Zynq SoC using axi-adc HDL core and corresponding drivers. The ADC is clocked by an AD9511 which is connected to two oscillators. The main reference comes from a 24.576 high…
最近在使用AD9511时,使用的主控芯片为stm32f4,用SPI2控制 AD9511,不管怎么样弄都控制不了AD9511,我想问下你们有没有类似的例程,别说官方的开发板,那都是上位机演示用的,没有任何帮助?
I read AD9634 datasheet.
In Figure 55. Differential LVDS Sample Clock (Up to 625 MHz), AD9634 is recever and AD9511 driver.
AD9511 Differential Output Voltage 250mV - 450mV.
AD9634 Differential clock input 300mV - 3.6V.
When AD9511 output 250mV, would…
I have an old eval board and wanted to know if there have been any updates to the software. Where can I get a copy of your latest EVB software for the AD9511?
My reading of the AD9573 datasheet indicates that the 100M output is fixed at 100MHz (not adjustable), which is too high for AD9231.
On page 7 the datasheet indicates that the max. Input Clock Rate for the AD9231 is 625MHz. Why should the 100MHz…
Hello,
We're having some trouble with an AD9707. We're clocking it at 122.88MHz from a LVPECL output of an AD9511 that should meet differential clock level specifications of AD9707 and we've checked that it does. We're using a ramp generator as data…
Yes there is a way, the clock distributor is outputting LVPECL 1600mV and it can be increased to LVPECL 2000mV. Will try it. That is for ADF4355 references, which are LVPECL differential AC-coupled.
I have tried to sniff the PCB with a crude DIY E-field…