FAQ
I have a question about the ad9467 SFDR.
The test environment used a sampling clock of 250 MHz and inputs from 137.5 MHz to 237.5 MHz.
SFDR is measured higher than the datasheet.
AD9467-FMC-250EBz was used. Attach the capture file.
Please review.
…Hi,
According to datasheet, SCLK, SDIO and CSB Maximum Ratings depend on SPIVDD, which is -0.3V to SPIVDD + 0.2V.
In ad9467-fmc-250ebz Evaluation board schematic, SPIVDD(VDD3SPI) is connected to 1.8V, SCLK_DUT and SDIO_DUT are connected to 3.3V logic…
I am working with AD9467-250 in a product where we need -84dBc THD @ -1dBFS, 250MSps, 1MHz signal. Using external reference (2.5V).
The AD9467 datasheet does not give THD performance, but SFDR is a good indicator.
The AD9467-250 is supposed to give 97dBFS…
Hi
I want to know what is the minimum and maximum input (Voltage and frequency ) for the AD9467 FMC board? plz Help