• Looking for un updated ADC insted of my old AD9445  .   need to be 16 bit  > 4MHz Sample rate

    Looking for un updated ADC insted of my old AD9445  .   need to be 16 bit  > 4MHz Sample rate

  • AD8352 DIFFERENTIAL AMPLIFIER

    Currently am using AD8352 AC coupled  differential amplifier to drive ADC AD9445, It is working fine for sine wave input with any frequency... The problem is whenever we try to apply a pulse input with varied duty cycle to differential amplifier it introduces…

  • RE: High Speed ADC Consideration.

    Hello David,

               Thank you for the answer. May I ask you to please also suggest parallel data out ADCs (CMOS, LVDS) with fin > 400MHz data; I found AD9445 but wish to know if there are others with measured results. We are considering both the options (parallel…

  • AD8352 DIFFERENTIAL AMPLIFIER

    Currently am using AD8352 AC coupled  differential amplifier to drive ADC AD9445, It is working fine for sine wave input with any frequency... The problem is whenever we try to apply a pulse input with varied duty cycle to differential amplifier it introduces…

  • 去耦技术

    何谓正确去耦?有何必要性?


    如果电源引脚上存在纹波和/或噪声,大多数IC都会有某种类型的性能下降。数字IC的噪  声裕量会降低,时钟抖动则可能增加。对于高性能数字IC,例如微处理器和FPGA,电源  额定容差(例如±5%)包含直流误差、纹波和噪声之和。只要电压保持在容差内,数字器件  便符合规范。


  • 不良去耦技术对放大器和ADC的性能影响解析

    不良的去耦技术会对基础元件运算放大器和ADC带来哪些影响呢?本文为您一一解答


    图1显示1.5 GHz高速电流反馈运算放大器AD8000的脉冲响应

    两种示波器图表均使用评估板获得。左侧走线显示正确去耦的响应,右侧走线显示同一电路板上去除去耦电容后的相同响应。两种情况中,输出负载均为100 Ω。

    图1:去耦对AD8000运算放大器性能的影响



    图2显示AD8000的PSRR,它与频率成函数关系

    请注意,较高频率下PSRR下降至相对较低值。这意味着电源线路上的信号很容易传播至输出电路…

  • RE: AD9243的接地问题

    为了获得最佳的性能,建议你按照数据手册里推荐的评估板来设计PCB,对于高速ADC的布线的相关问题,建议你可以参考附件。

  • RE: 频率转换功能IC

    您好!

    相关解决方案和产品请见附件内文档。

  • ADA4937 Gain resistors

    Hi,

    I'd like to know if there is any problem in using resistors of some kOhms as RF and RG for ADA4937 fully differential amplifier: I need a 2kOhms input impedance.

    Thanks.

  • RE: ADI设计峰会讲义分享——数据转换:简化难题

    本讲义完整内容,请点击下载: