Please refer to the below post.
If using Linux, then you should use libiio & the ad9371 iiostream example.
You don't get too much access to DDR memory directly from Linux.
If using no-OS, then you can access the DDR more directly.
Some sample-code for AD9371 & no-OS is here…
Our problem has been solved partially.
Our observation was, usually first AD9371 was giving JESD errors. In our board clock output 0 of AD9528 is connected to first AD9371 clock pin. When we stop the clock output 0 of AD9528 and again start…
I can see here that the probe fails for AD9371 it seems to be an SPI issue:
ad9371 spi32766.1: ad9371_probe : enterad9371: probe of spi32766.1 failed with error-22
You could check wheter the SPI configuration is ok and also add some prints inside the…
1. Installer from the readme page: https://gitlab.com/tfcollins/MathWorks_tools/-/jobs/artifacts/master/download?job=deploy
We are using AD9371 EVM board in our design. The issue is the ADP5054 voltage is not proper on VOUT2. We expect 1.3V but we are getting 10.2 V. observed that at FB pin the voltage is 0.Before connecting to the AD9371 section the voltages are fine…
I have a question regarding the RFPLL frequency step procedure for the AD9371, which is described in the UG-992 document at the "RF PLL Frequency Change Procedure" section. There is a restriction which states that the frequency step cannot cross a 'divide…
Refer to the below post:
Checking my Linux boot logs, I notice there is an issue with mismatching ILAS with MyKonos:
[ 7.944273] ad9371 spi32766.0: ad9371_probe : enter[ 9.031602] random: crng init done[ 15.783944] ad9371 spi32766.0: framerStatus (0x0)[ 15.788618…
tstrickland said:But I'm confused why we're looking at the Deframer in the AD9371. I thought it was related to the Tx/DAC path based on this block diagram
Deframer is in the Tx data path in AD9371. So you don't have issues there . Deframer fifo…