• AD9363 S parameter Files


    I found the s parameter files for the AD9363 here: https://ez.analog.com/wide-band-rf-transceivers/design-support/w/documents/10072/general-rf-front-end-matching-methodology

    It is a bit unclear to me how these s parameters were taken. See questions…

  • Using TxLO for RX on AD9363

    Hi support team,

    I would like to run the RX downconverter with the TX LO in an application where TX and RX must run from exactly the same clock. Not just same frequency, but also same phase and same phase modulation / phase noise to the extent possible…

  • AD9363 custom board question,about AD9363 connect to zynq error

    I have made a custom board which used with zynq7010-clg400 and ad9363.Its hardware schematic diagram (detaild in  attachment pdf) based on  pluto-sdr(linked here).And its firmware is also based on  pluto-sdr (linked here).I have modified the system_constr…

  • RE: AD9363,the power control resolution is not qualified 0.25dB.

    Please donot post queries under answered threads as that might get ignored. Please post a new thread with the below details;

    How much variation in TX attenuation are you seeing with input power level? Till what input power level are you seeing a linear…

  • ad9363 the document indicates the testing frequency of 6ghz

    comparing the documents AD9361 Reference Manual UG-570.pdf as well as AD9363-Reference-Manual-UG-1040.pdf found that the RF tested are identical.

    I want to understand, did you do CTRL + C and CTRL + V or the documents are up-to-date and the chips have…

  • win10 can't detect on my AD9363

    i used AD9363 model.
    I tried tuning for FM frequency reception, so I followed this link :
    After that, only LED1  is dim  and READY button is not lit and device manager does not recognize it.
    And, we tried…
  • AD9363 The waveform of Rx Q is abnormal

    The figure above shows that AD9363 sends I/Q data to FPGA. Peak waveform distortion,Cause Maximum gain is set. Q data should be a straight line(like I data),But actually not.

    How to solve this problem? BB DC Offset  or  RF DC Offset?

  • AD9363 AGC

    HI, Now I using AD9363, there are some questions plague me.


    1.When ad9363 works in TDD mode, what mode should AGC be configured to?SLOW OR FAST?

    2.When ad9363 works in TDD mode,is AGC GAIN keep state after RX_EN down, just as ADRV9009?


  • Can't rececive OFDM symbol using AD9363

    i want to transmit and recevie ofdm sysmbols with pluto on simullink but had diffrent result copare to witout pluto

    -without pluto and awgn channel

    set snr:30DB  (left spctrum :tx, right spectrum:rx)


    -with pluto

    this is my simulink block and setting…

  • AD9363 LVDS Voltage


    The LVDS voltage data below is from the AD9363 datasheet, with VDD_INTERFACE=1.8V

    If 2.5V is applied to VDD_INTERFACE, is the voltage data in above table still valid?

    (We're assessing to connect Xilinx Artix-7 LVDS_25 port (LVDS_1.8 is not available…