• bad performance at some specific gain of ad9361

    Hi ad9361 experts:

        I am using ad9361 with FAGC mode. When I input different amplitude signal into the RX port of ad9361, I found that when the input signal is between -67~-72dBm, the device can not receive correct signal. But it works well when the input…

  • RE: ZC706-FMCOMMS5 IIO oscilloscope not loading FMCOMMS5 plugin

    The device is unable to calibrate:

    ad9361 spi32766.0: Calibration TIMEOUT (0x5E, 0x80)
    random: crng init done
    ad9361 spi32766.0: Calibration TIMEOUT (0x247, 0x2)
    ad9361 spi32766.0: Calibration TIMEOUT (0x287, 0x2)
    ad9361 spi32766.0: Calibration TIMEOUT (0x247…

  • AD9361 Data Interface Question


    I am trying to understand the data interface to this chip.  When in CMOS, dual port, half duplex mode; the BBP drives the ENABLE and the TXNRX lines.  My understanding is that it asserts the enable high with TXNRX low to request any received data…

  • RE: AD9364初始化问题及标准初始化流程?

    可以用标准的初始化脚本, 唯一的差别是DCXO的配置,详见附件文档

  • RE: 请教专家:  应用于终端时关于AD9364参考时钟稳定度要求


  • RE: AD9364晶振

    如果你说的是外部晶体, 而不是晶振, 则需要用到芯片内部的DCXO, 参考附件DCXO的应用文档

  • RE: AD9361晶振的问题

    你说的无源外部"晶振", 应该是指单独的晶体吧(不带振荡电路的那种). 用晶体是需要配合芯片内部的DCXO才能正常工作的. 详见附件关于DCXO使用的文档。

  • RE: Adalm Pluto AD9363 build in but referring to AD9363

    AD9363 is really within the AD9361 family. AD9361 came first. AD9363 is really just a feature trimmed, cost optimzed version of the AD9361. 99% of the doc applies to both. The same driver and HDL is used on both.


  • RE: AD9361输出功率监控



  • RE: Missing axi-ad9361-dds in my FPGA build for FMCOMMS2

    Hi Adrian,

    Thanks for the info.

    I did find the DDS inside the AD9361 block.

    However, my self generated Device Tree does not contain the reference to the cf-ad9361-dds-core-lpc@79024000, as is the case with the ADI distributed version of this device…