• RE: AD9287 interface (Xilinx Artix7)

    Hi Eren,

    Thank you for trying the AD9287. Would it help you to look at the FPGA source code that we use to capture data from the AD9287? This code is written for Xilinx Virtex4.

    If you would like to look at this code, please let me know and I will email…

  • RE: AD9287 Dataout frequency not right

    Hi Xiawen,

    Thank you for using the AD9287.

    I agree with what you state from the AD9287 datasheet timing diagram.

    Would you please double-check the signals you are probing? I believe it is impossible for FCO frequency to be greater than DCO frequency,…

  • RE: AD9287 signals after initialization

    Hi,

    First of all, special thanks for your close interest.

    Yes , it was related to AD9287. I had a chance to look at the code that you sent but I could not figure out why SPI_control module is not included to top module. Because I did not write the code…

  • RE: AD9287 clock derived from an FPGA - issues ?

    Hi,

    AD9287 stops operating if the clock signal is removed. It should start working again after a clock input is provided. I recommend issuing a soft reset to the AD9287 through SPI after clock is restored if you are experiencing problem with the ADC…

  • RE: Do you have a good idea for connection AD9287-100EBZ?

    Hi Kaos,

    Thank you for working with the AD9287 customer.

    You already mentioned the CVT-ADC-FMC-INTPZB. This is what came to mind when I saw your question. I believe that CVT-ADC-FMC-INTPZB takes the AD9287 outputs to the appropriate FMC connector pins…

  • RE: Do you have a good idea for connecting AD9287-100EBZ

    Thank you for your comment Rejeesh.

    But on another removed sled your Doug posted the good idea.

    Do you have a good idea for connection AD9287-100EBZ?

    For the time being, I will report above idea to our customer.

    Thanks Kaos

  • [AD9287eval board] how to change input drive for DC signal?

    Hello,

    The customer is using AD9287 EVM.

    They would like to measure the signal that mixed DC. But EVM has capacitor for rejecting DC.

    Is there any way to modify EVM input stage for accept DC level signal?

    Thank you for your help as always.

    Best regards…

  • AD9287低温采样噪声问题?请帮忙

    hi ADI专家,

    signal chian: analog input-<AFE-<AD8334-<AD9287-100-<Xilinx FPGA.

    Clock input:epson100M crystal oscillator from TI CDCV304 clock buffer.

    1.8V analog and digital power all from TI TPS5430, analog and digital are from one supply…

  • RE: Input matching of switched capacitor ADC (AN-742)

    Hi 6j5,

    The parallel equivalent in AN-742 is shown because we are looking at the input differential into the ADC. I also think you are referring to an older revision of this app note. So I attached the latest.

    In all the ADC impedance tables that are…

  • RE: AD9287输出数据bit速率和位时钟对不上问题求助

    您好,该产品的使用问题请在咱们英文社区提问哦ez.analog.com/search