• Xilinx Zynq-7020 interface high speed ADC AD9278&AD9670

    Hello All,

    Please help for my question about Xilinx Zynq-7020 interfacing AD9278 (12 bit, 8-channel, up to 65MSPS) or AD9670 (14 bit, 8-channel, up to 80MSPS).

    1) Is Zynq-7020 (Artix-FPGA Fabric) able to interface and sample AD9278 or AD9670 8-channel…

  • Xilinx Zynq-7020 interface high speed ADC AD9278&AD9670

    Hello All,

    Please help for my question about Xilinx Zynq-7020 interfacing AD9278 (12 bit, 8-channel, up to 65MSPS) or AD9670 (14 bit, 8-channel, up to 80MSPS).

    1) Is Zynq-7020 (Artix-FPGA Fabric) able to interface and sample AD9278 or AD9670 8-channel…

  • AD9278 registers

    On the AD9278,  if I program the various device registers via SPI and then put the device into STANDBY, do the registers retain the programmed value when I bring device out of standby?  Same question for PDWN.

  • RE: IBIS model for AD9278/79

    Attached is an IBIS model for the digital output of the AD9278/9.  Please let me know if this helps your simulations. 

    Regards,

    Gina

  • Looking for drivers to communicate [ AD9278-50EBZ + HSC-ADC-EVALCZ ] with third party software eg: .NET, Matlab  etc.

    Hi;

    I'd like to pull the raw captured data from the evalcz board.  What solutions are available?

    Thanks,

    -Gregg

  • RE: HSC-ADC-EVALDZ and AD9681

    Hi Niqilulu,

    Please confirm that on the board, as close to the AD9278 as possible you have power to the AD9278 power pins, and that the sample clock is present.

    Thank you.

    Doug

  • RE: AD9287 interface

    Hi Poiu_Elab,

    Are you using the AD9287 evaluation board, or the AD9278 on your board?

    Thank you.

    Doug

  • CWD IV amplifier driving capability

    Hi,

    In AD9278, using ADA4841 as IV amplifier. But it mention that one ADA4841 has maximum sum number (4 AD9278s, 32 channels). If we use ADA4896 as IV & summing amplifier, how to calculate the number of channel can be summed in one ADA4896? Note that…