On the AD9278, if I program the various device registers via SPI and then put the device into STANDBY, do the registers retain the programmed value when I bring device out of standby? Same question for PDWN.
Good afternoonWe have problems with the AD9278. Unable to use the whole dynamic range.AD9278 distorts RF signal like in attached files.Maybe our connection/programming are wrong or this is normal operation forthis chip?.Best regards Romas
is there data available concerning the phase response of the analog inputs of your ADCs?
I am using the analog front end chip "AD9278/AD9279" with 50MHz sample rate. However, I have signal integrity problem on the trace of data output pins (DOUT+ / DOUT-) to my FPGA(output data frequency is 50MHz x 12bits / 2 = 300MHz in my case). I would…
I am currently using an AD9278 with a HSC-ADC-EVALCZ board, and I was hoping to interface to these with either a C based code or Matlab, and I was wondering if there any drivers one could get with appropriate documentation?
Thank you in advance…
I have been trying to configure the AD9278-50EBZ and the HSC-ADC-EVALCZ for data acquisition. I found the MATLAB script for acquisition on the AD9253 using the HadBoardApi and tried to adapt it (see code attached) to my hardware however, I have a challenge…
I use the following command to write register of ad9278 through SPI. It seems it doesn't work.
We have scoped the spi signals which look good. Please help to check if I missed something. Thanks.
d_REG1 <= 24'h00_00_18 ; d_REG2 <= 24'h00_04_0f…
Please help for my question about Xilinx Zynq-7020 interfacing AD9278 (12 bit, 8-channel, up to 65MSPS) or AD9670 (14 bit, 8-channel, up to 80MSPS).
1) Is Zynq-7020 (Artix-FPGA Fabric) able to interface and sample AD9278 or AD9670 8-channel…