• AD9278-65EBZ/AD9278-80KITZ/AD9279-50EBZ or Evaluation Board and HSC-ADC-EVALCZ Data Capture Board 采集信号,频率偏移

    您好,

          我们采购了AD9278评估套件,并按照AD9278_79_EVB_User_Guide.pdf的操作指示一步步操作,我们用信号发生器从CH_A输入了1路10MHz的信号,当运行了FFT的例程后,出来的能量最大的信号是7.63MHz,并在10MHz处没有信号;同样输入了1路5MHz的信号,当运行了FFT的例程后,出来的能量最大的信号是3.8MHz;输入了1路1MHz的信号,当运行了FFT的例程后,出来的能量最大的信号是0.78MHz。

          目前查阅资料没有找到有效的解决办法,请求你们的帮助…

  • AD9278 registers

    On the AD9278,  if I program the various device registers via SPI and then put the device into STANDBY, do the registers retain the programmed value when I bring device out of standby?  Same question for PDWN.

  • AD9278 dinamic range

    Good afternoon
    We have problems with the AD9278. Unable to use the whole dynamic range.
    AD9278 distorts RF signal like in attached files.
    Maybe our connection/programming are wrong or this is normal operation for
    this chip?.
    Best regards Romas


  • AD9278 & AD9252 Phase Response

    Hello,

    is there data available concerning the phase response of the analog inputs of your ADCs?

    Best regards,

    Manuel

  • IBIS model for AD9278/79

    I am using the analog front end chip "AD9278/AD9279" with 50MHz sample rate. However, I have signal integrity problem on the trace of data output pins (DOUT+ / DOUT-) to my FPGA(output data frequency is 50MHz x 12bits / 2 = 300MHz in my case). I would…

  • AD9278增益问题

    您好,目前我们在用AD9278做检测设备,发现个现象,当增益增加到某个值时(最大值的一半),信号最大,再往上增加,增益下降,这个怎么处理、

    谢谢

  • AD9278 with HSC-ADC-EVALCZ drivers and documentation

    Hello,

    I am currently using an AD9278 with a HSC-ADC-EVALCZ board, and I was hoping to interface to these with either a C based code or Matlab, and I was wondering if there any drivers one could get with appropriate documentation?

    Thank you in advance…

  • AD9278-50EBZ + HSC-ADC-EVALCZ Acquisition from MATLAB

    Hi

    I have been trying to configure the AD9278-50EBZ and the HSC-ADC-EVALCZ for data acquisition.  I found the MATLAB script for acquisition on the AD9253 using the HadBoardApi and tried to adapt it (see code attached) to my hardware however, I have a challenge…

  • how to config ad9278 to generate test pattern

       I use the following command to write register of ad9278 through SPI. It seems it doesn't work.

    We have scoped the spi signals which look good. Please help to check if I missed something. Thanks.

    d_REG1 <= 24'h00_00_18 ;
    d_REG2 <= 24'h00_04_0f…

  • Xilinx Zynq-7020 interface high speed ADC AD9278&AD9670

    Hello All,

    Please help for my question about Xilinx Zynq-7020 interfacing AD9278 (12 bit, 8-channel, up to 65MSPS) or AD9670 (14 bit, 8-channel, up to 80MSPS).

    1) Is Zynq-7020 (Artix-FPGA Fabric) able to interface and sample AD9278 or AD9670 8-channel…