• AD9271

    我是学生,第一次用AD9271,想要采集正弦波。使用FPGA控制AD9271,DCO和FCO输出都正常,但连接1MHz的正弦波时DA输出与不连接输入信号时一样,都是只有一个持续的脉冲信号,不知道哪里出了问题,希望大家给我一些建议

  • How to use AD9271

    Is it necessary to configure AD9271 when using it?

    Now, I control AD9271 through FPGA, only DCO and FCO have clock output, but DOUTx has no output (a high level). 

    How can I solve this problem?

    Thank you.

  • AD9271 digital output

    HI EngineerZone.

    I am donig a capture test using the AD9271 ADC (25 MSPS variant) in my data acquistion system.For this I am appling a 1 MHz ac coupled 1Vpp sinewave to one channels of my AD9271.I am controling this ADC with an FPGA.Because I want to…

  • AD9271-BSVZ25 SPICE MODEL?

    HI EVERYONE. MY QUESTION IS HOW I CAN ACCESS AD9271-BSVZ25 SPICE MODEL? I DIDN'T FIND PLEASE HELP ME. THANK YOU

  • ADC9271 FPGA Code

    I am interfacing the AD9271 to a Zynq Xilinx FPGA. Is there a reference Verilog or VHDL design to interface the LVDS Serdes  out of the ADC into the FPGA?

  • RE: SPI configuration to ADC/AD9271 fails

    The AD9271 requires a software transfer bit be written to latch the SPI writes into their registers.  This is found in Register 0xFF, bit 0.  It is self-clearing but does need to be written after all write commands.

  • AD9271 digital output

    Hi EngineerZone,

    I am doing a sinewave capture test using the AD9271 ADC (25 MSPS variant) in my data acquistion system. For this I am applying a 1MHz ac coupled 100mVpp sinewave to two channels of my AD9271, with the remaining six channels left unconnected…

  • DCO signals from the AD9271

    This is about the differential DCO outputs from the AD9271. I am controlling this ADC with an FPGA. A 10 MHz signal is sent to the CLK pins, using the Figure 58. Single Ended circuit given by the datasheet.

    When I tried to collect the digital bits from…

  • AD9271 Output Varying by up to 10% from channel to channel

    I am seeing a variation in outputs from channel to channel when I input the
    same signal on all channels. The variance is around 10%.

     

    If the input is DC coupled into the ADC, then the channels will have different
    offsets, and the offset…
  • RE: AD9371_Design_File_Package

    Sorry, we provide only PDF form of schematics.

    Kindly post under relevant subspace to get faster response.

    For Example for AD9271 HW please post under

    https://ez.analog.com/community/wide-band-rf-transceivers/design-support-ad9371