We use adl5201 as adc driver for AD9268, and ADL5201's output can reach 10Vpp, we are worrying this will breakdown the AD9268 since its maximum rate is −0.3 V to AVDD + 0.2 V. We note there are some ESD diodes in its input pins. Is this enough to…
Do you mind what´s the AD9268 crosstalk @ 500 MHz input frequency?
All dual ADC datasheets shows only crosstalk @100 MHz...
thank you very much
Fernando Henrique Cardoso
Beam Diagnostics Group (DIG)
I use AD9268-125EBZ + HSC-ADC-EVALCZ + VisualAnalog + SPIcontroller.
I've connected the All and programmed the FPGA via FFT sample in VisualAnalog. When I run the SPIcontroller, I got the error "Read Test failure, Chip ID is not known, newDUT will not proceed…
我现在要采集一个 +- 5V范围内变化的模拟信号的电压图形，现在准备用AD9268采集，不知道前端电路这块怎么做？
Can I connect the AD9268-125EBZ with a CVT-ADC-FMC-INTPZB interposer board to the Zedboard (FMC)?
Any FPGA reference designs available?
In the datasheet of AD9268, sync pin is CMOS level, but in the evaluation board, the sync is AC coupled. Does this mean there is a bias voltage inside the chip?
I'm actually working on a design with AD9268 in CMOS output configuration and an FPGA. The issue I'm struggling with is a statement in the datasheet of AD9268:
"Applications requiring the ADC to driver large capacitive loads or large fanouts…