• constraints in Spartan6 for AD9265 interface

    I have an old project where an AD9265 interfaces a spartan6 FPGA (no optión to change the hw) in LVDS mode

    Recently we are experiencing problems with the interface under some temperature conditions. To be honest we have never understood correctly…

  • AD9265-FMC-125EBZ evaluation board and Peta Linux


    I try to insert in Petalinux the driver for the AD9265-FMC-125EBZ evaluation board.

    Following these indications:




    I copy the files in in Petalinux linux directory…

  • AD9265 input impedance



    what input resistance may I assume for the AD9265 in the range 0 to 50 MHz ? It is 6 kOhm in the datasheet, but it appears higher (almost 18 kOhm at about 15 MHz and quite variable with frequency ) from the following  Excel file(see attached plot…

  • AD9265 Evaluation Board.

    I have an AD9265 EVAL and HSC-ADC-EVALCZ. I have the SPI Controller software and I noticed a SPI register that was not in the data sheets. Specifically it was under ADC INPUTS (F) and there is a checkbox for CM SERVO. I was hoping if someone should shed…

  • AD9265-FMC-125EBZ Schematic

    Hi all,

    I just got my AD9265-FMC-125EBZ Eval Card. I have three questions:

    1) CLOCK IN

    In my application, I need to provide the clock through my FPGA. In doing so I want to use the J201 CLKIN SMA connector. Looking at the board and/or schematic, it…

  • AD9265 SPICE model



    I'm trying to design a SPICE model for the AD9265 switched-capacitor input. Are the sample capacitors (Cs in Figure 64 attached) discharged (to 0 Volt) before any new sample (track) phase or their charge starts from the voltage of the previous…

  • AD9265-FMC-125EBZ with ML605


    I'm designing an application for recording 16 bit time series in a triggered manner for a precision cold atoms experiment. We have already an ML605 in our lab, which can be used for data acquisition. For our application, based on the estimated…



    I am Satyabrata. We are using AD9265 evaluation board. We gave analog input of 1V pk-pk, clock input of 100 MHz frequency and 1.8 V pk-pk sine wave.

    We checked the pins of databus of the evaluation board.

    Results what we have got are as foll…

  • RE: AD9265 offset drift?


    The typical offset drift for the AD9265 is +/-2 ppm/C which corresponds to +/-4 uV/C with a full-scale span of 2 Vp.p.

    The ADA4937-1 is specified at 1 uV/C typ  but this applies to its input only and its output offset drift would be dependent…

  • AD9265 some bit is no ouput

    the hardware design is Strict reference the Evaluation Board User Guide(UG-003)of ANALOG DEVICE

    (1)when AD9265 work in test mode ,all is ok.

    (2)when AD9265  work in normal mode and dither disable,and the full range signal  sine wave is send to vin+ and…