• AD9253 does not work properly

    I want to use AD9253 in default setting, therefore I do not need SPI configuration. AD9253 is connected to Ultrascale+ MPSoC and I have examined the output clocks and digital output pins by using Integrated Logic Analyzer (ILA) debug core in Vivado. Then…

  • AD9653/AD9253 NOT DETECTING ON VISUAL ANALOG

    HAI ALL..

     I HAVE INSTALLED SPI CONTROLLER AND VISUAL ANALOG SOFTWARE ON MY SYSTEM AND CONNECTED THE HSC-ADC-EVALCZ BOARD TO AD9253 AND POWERED ON.

    THE ON MY DEVICE MANAGER ON USB CONNECTIONS I CAN NOTICE HSC-ADC-EVALCZ. BUT ON VISUAL ANALOG THE AD 9253…

  • The configure of AD9253 did not take effect

    I want to set the output of AD9253 in  SDR two-lane, bytewise mode,  so modify the value of 0x21 to 0x10,but the output did not effect. I confirm the value has been modified, because  this value is written and read back the same. Could you tell what went wrong…

  • ad9253 register 0x100 configuration failure

    hi,I am having a problem with ad9253 bcpz-125 under 125MHz clk.The register configuration is as follows

    ad9253_spi_write(0x00,0x38);
    ad9253_spi_write(0x15,0x01);
    ad9253_spi_write(0x0B,0x02);

    In this configuration,ad9253 works.

    fco waveform

    ad data

    but…

  • AD9253-80 S&H components

    Hello,

    I am designing an analog front-end for imaging applications. I am planning to use the AD9253-80 as the ADC and I would like to know if there are more details about the values of the internal S&H components (particularly tracking and hold capacitors…

  • AD9253 & ADA8282

    Hi, I'm new to ADC 9253. Do I need protection of the ADC input in the circuit and if so, how to do it?

  • AD9253

    Ad9253 signal acquisition test, F = 100.2mhz, FS =100MHz . Using Output Test Mode (1-/0-bit toggle), FPGA can correctly receive AAA8
    Question: After passing the Output Test Mode interface Test, can it be considered that the transmission between LVDS data…

  • RE: AD9253

    The clock signal has no obvious noise.

    What does the clock signal look like at the CLK+/- pin of the ADC?