• RE: some question about AD9248

    Can I drive the AD9248 with ADA4930-1 such a way?

    note that AD9248 doesn't have Vcm pin. This is why I've used two resistor voltage divider.

    (AVDD_AD9248 is the positive supply for AD9248)

  • RE: Input common-mode voltage range of AD9248

    Hello jdobler,

    Thank you for your reply.

    I can understand that your mentioned.

    But I need the consideration result about specifications of AD9248.

    Could you ask to the AD9248 engineer about this question ?

    Best regards,


  • RE: Who can sell me / give me an AD9248 Evaluation Board


    The AD9248 is an older device released back in 2005.  While we still sell the IC itself we no longer sell the EVB due to low demand for new design-ins on this device.  The AD9251 would be a functional replacement for the AD9248 and has an EVB available…

  • looking for AD9248 schematic symbol

    Can you provide a symbol for the AD9248?



  • RE: AD9248BCP-65EBZ  Revision D datasheet


    The eval board information is at the back of the AD9248 datasheet, from Page 22 on.

  • clock generator for the high speed ADC


    How should I provide a 65MHz clock for the AD9248 ADC?

    is there any chips or solution boards?


  • RE: ADC 12/14BIT, >2mS/S, Parallel digital interface

    Hi Meir,

    You may  want to check the ADI website and do a parametric search to filter the product display  base form your recommended specification.


    Here are some ADCs that might help  you start with, kindly see attched file.

  • AD9248 schmatic dsn or symbol

    can anyone provide the AD9248BCP-65EBZ  orcad schematic design file ?

    otherwise kindly provide AD9248 LFCSP , orcad design symbol .

  • RE: AD9248 LQFP and LFCSP


    I moved this question about the AD9248 to the High Speed ADCs Community.  Someone here should be able to assist you.



    EngineerZone Community Manager

  • RE: ADSP21489 interfacing with AD9248

    I looked at the glue logic that we used for a PDAP ad9248 interface.

    It used a div/2  FF from an input clock to create ADC CLK & ADC CHAN

    The PDAP Clock was created by a Shift register chain with 7 delays from the input clock. There was a little…