• AD9246 Output Noise


    Excuse my non-perfect technical understanding, however;

    We have a small device that implements the AD9246. The outputs are configured to 3.3V level and it runs at 80MHz. The outputs are connected directly to the FPGA input pins, the maximum distance…

  • AD9246: Using Opamp

    Help me please concerning a "INPUT COMMON-MODE VOLTAGE" range of AD9246 and
    its impact on the ADC performance: SNR and SFDR. 
    In the AD9246 datasheet on page 15 the following is told: Setting the device
    such that VCM = 0.55…
  • AD9246: Capacitive drive

    In the datasheet there is no specification of the maximum capacitive load of
    the digital outputs of  the ADC(I quote in datasheets pg 21 : "...large
    capacitive loads...",please define large). We use a 3.3V digital power. Sample
  • AD9246: Timing parameters

    In the AD9246 datasheet, all timings parameters are based on DRVDD =2.5V. For
    our design DRVDD is 3.3V. Does this make any difference on setup and hold time


    1.   Q1: In the plots provided the CLK input was not shown – only the…
  • VisualAnalog Model for AD9246-80


    where can I find the ADC model for the AD9246-80 for the simulation in VisualAnalog?

    The current available software is VisualAnalog, but the model wasn't installed.

    I had a look at the page http://www.analog.com/en/converters-tools…

  • PN sequence in AD9246

    hi, i have an AD9246 and i want to check the PN sequence of my device,

    i enabled this config for my device with SPI, but i dont know how to check it?

    and how can i measure the error? cross-talk of my board? and clock jitter

    PLZ , help me



  • AD9246: Wake up time from standby mode

    I would like to know the wake-up time of AD9246 from the standby-mode back to
    the normal operation.


    Assuming you leave the clock applied to the part during standby – the part
    requires about 1us to recover from the standby state.  If…
  • AD9246相关问题请教




  • AD9246: SNR equations, jitter calculation and Vref

    Page 20 of the AD9246-125MSPS data sheet contains figure 51 which is a graph of
    SNR versus input frequency when the clock contains specific levels of jitter.
    The theoretical equation for how SNR relates to jitter and input frequency is
  • FAQ : SDIO equivalent circuit in AD9246

    Question :

    What is the equivalent input/output circuit of SDIO pin in AD9246?


    Answer :

    The SDIO pin in AD9246 is the same as a regular digital SDIO pin and…