Is anyone aware of power sequencing requirements for the different supply rails on these parts?

AVDD1-> 1.25V

AVDD2-> 2.5V

AVDD3-> 3.3V

AVDD1_SR-> 1.25V

DVDD-> 1.25V

DRVDD-> 1.25V

SPIVDD-> 1.8 to 3.3V

The datasheet doesn't…

UmeshJ

Hello,

I'm working on a project which uses AD9234. I'm using  Altera FPGA board to receive ADC data.

Now I need to readback the register data but it doesn't work. The spi wires include CSB,SCLK SDIO.

For example, when i need to readback…

Following these directions, https://wiki.analog.com/resources/eval/ad9680-1000ebz#design_and_integration_files, when in using VisualAnalog, I am supposed to be given an alert asking if it can program the FPGA with the appropriate bin file. This never happens…

Hi everyone,

I'm working with a board which was designed in our company. It contains a Xilinx Kintex-7 FPGA and an AD9234 ADC. It got this combination working so far that I am able to see some kind of digitized signal at the output. What I did was to…

hi

 I have some questions about my ad9234-1000.

Here is my register setting:

device.OutputSysrefAdc(false);//output_sysref 0

device.WriteAD9234( 0x0, 0x81);// soft reset the device
System.Threading.Thread.Sleep(500);//wait for 500 ms
device.WriteAD9234…

HI:

   I have a problem with AD9234-1000. It can be seen from the datesheet that the Chip_GRADE register is read-only. And we can see the range of clock rate of  AD9234-1000 is 0.3~4GHz.

   The question is : can I use the  AD9234-1000 in the 500sps sampling…

Hi,

I am trying to evaluate the AD9234 500MSPS 12 bit dual channel ADC, using the AD9234-500EBZ evaluation board, but I want to evaluate the data on a Xilinx zc702 or zc706 development board.

Is this possible? I cant find any pinout diagrams or timing…

Hi there,

Currently I'm looking which ADC to use in combination with my Altera Stratix V device. I've tried to make an overview of 3 different Analog ADC, but would like to check if I understood/interpreted the datasheets correctly. I would like to use…

Hi,

      There is a question about the sampling rate of AD9234-1000.

      Configure LMF as 421 before ,AD9234-1000 can work well with 500MSPS sampling clock.

      Now I cofigure LMF as 411 for 1GSPS sampling becuase my lane rate can only reach 9Gbps. But the chip…

Hi,

I have the following setup:

AD9234-1000 Eval Board

AD9528 Evalboard

ADS7-VEEBZ

I need to test the AD9234 ADC for next development steps. I need some help in connecting the clock source from the AD9528 Eval to the AD9528 Clock generator. What…