• AD9234 coplanar ground

    Customer is asking the following question. Please share your experience :

    "We are trying to find a reliable way to manage signal Gnd return between a very wide bandwidth T & H and AD9234, through use of Grounded CPWs.  AD9234 has Pwr-S-S-Pwr…

  • IIO AD9234 decimation setting?


    I am using an AD9234 (equal to AD9680) with 5G JESD lane rate and 500MHz sample clock in order to get 2 channels 500 MS sampling rate.

    Today I tried the performance with faster signals. Until I reach a Frequency over 125MHz ervything looks fine and…

  • AD9234 - PRBS Pattern Testing


    I'm able to receive JESD Test mode patterns in FPGA board successfully. Since we are able to receive data, we are working on traffic test. 

    When we configure PRBS 7 at both ADC board and Kintex 7 board, we observe no link and high BER. Even…

  • AD9234-1000EBZ and ZCU102


    I cannot find any documentation about the AD9234-1000EBZ. Do I need an external clock and Ref clock for this ADC?


    Is this compatible with the ZCU102?


    I want to control the AD9234-1000EBZ with the ZCU102, I don't need a application, I want to write…

  • AD9234 PRBS Testmode


    Is it possible to transmit PRBS7 analog samples using ADC pre-defined test mode register (0x550/0x573). The below pattern is captured from BERT scope, PRBS7 at 25G line rate using Tek scope. Is it possible to transmit similar PRBS7 samples with one…


    In the document titled EVALUATING THE AD9680/AD9234 ANALOG-TO-DIGITAL CONVERTER , item 7 of 'Configuring the board' gives an equation for the REFCLK. What should the values for M and L be?

  • AD9234 Data Output always 0

    Hi everyone,

    I started working on a board which was delevoped at our institute in the past. It contains a AD9234-500 ADC and a Kintex-7 FPGA.

    Now I wanted to read out the ADC data. For this I configured all ADC registers to standard. We are using a…

  • AD9234-1000EBZ with ZC706


    I'm trying to use the AD9234-1000EBZ on a ZC706, but I found no documentation.

    I don't know how to connect the clock from the JESD204 from xilinx. I found a code for the ADS7V1(ftp://ftp.analog.com/pub/HSC_ADC_Apps/ADs7-V1_packet/FPGA_code…

  • AD9234 and AD7616 hdl design


     Is it possible to use the AD9234 (1 channel @ 1GS) which uses JESD for data transport and 2 AXI ports in my design and one AD7616 16 Bit 16 Channel ADC with parallel interface and 1 AXI port in one design?

    For high speed measurements I need the…

  • Power sequencing for AD9234

    Is anyone aware of power sequencing requirements for the different supply rails on these parts?

    AVDD1-> 1.25V

    AVDD2-> 2.5V

    AVDD3-> 3.3V

    AVDD1_SR-> 1.25V

    DVDD-> 1.25V

    DRVDD-> 1.25V

    SPIVDD-> 1.8 to 3.3V

    The datasheet doesn't…