• AD9225 Output Data Format

    Hi all,

    Output Data Format @ AD9225 is the straight binary or offset binary ?

    In the datasheet @ AD9225, 17 page,
    "DIGITAL INPUTS AND OUTPUTS
    Digital Outputs"

    1.
    "The AD9225 output data is presented in positive true straight binary for all input…

  • why not ENOB in date sheet for AD9224 or AD9225

    why not have  ENOB in date sheet for AD9224 or AD9225

  • Simulation Model for AD9225

    Is there a (Verilog/VHDL) BFM or simulation model for AD9225?

  • AD9225: Effect of varying the clock period and duty cycle

    Now I revise project of 3 years old (ADC module). And have question. If I will
    give to CLOCK input (AD9225) signal with 50 ns CLOCK HIGH pulsewidth and
    variable (50ns-1ms, with step of 50 ns) CLOCK LOW pulsewidth. Will this
    degradate…
  • ADC Interfacing to BF533

    Hello and Happy 2010 to all,

    I am looking to interface AD9225 (12-bit, 25MHz) to a Blackfin BF533 using the PPI port. Here's the setup I intend to use (only talking about the digital side of things):

    • AD9225 driven by external clock (~ 10MHz or…
  • How to reduce consumption of AD9225

    This part does not have a dedicated powerdown mode, but what is the best way to
    reduce the power consumption during idle periods when conversion is not
    required?
    Would stopping the input clock signal have a significant effect? What sort…
  • AD9225 CLK stop and resume

     

    Hi

    I have some questions about AD9225.

    This ADC does not have a PWDN terminal.

    May I stop the clock of this device for a power save?  and how many cycles is it required for wake up?

    I have tried bench test for wake up.

    In order to acquire valid…

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