1/ What does DVDD from 2.7 to 5.25 mean ? 2/ Is it possible to work with a DVDD=3.3V ? 3/ In this case, which clock level has to be put : 3.5Vmin/1.0Vmax ?
1/ What does DVDD from 2.7 to 5.25 mean ? All production testing an datasheet specifications…
In AD9220 datasheet, the DVDD determines the digital output level. For CLK input, the high voltage level should be larger than 3.5V. Is it true for 3.3V DVDD power supply? I use 3.3V level clock and would like to know whether it is OK.
this seems to be some sort of coupling in the board.
Hello. I have an analog signal coming from a sensor to the AD9220 between 17 and 19V and at a frequency of 200Khz.
That means that my analog signal is between 17 and 19V
I need then to create an offset of -17V in the way to be able to have the…
Please tell me the logic input level (VIH / VIL) of AD9220 at DVDD = 3V.
it looks to be a digital timing issue on the data capture side
采用datasheet里的simple ad interface接口电路。 我的信号频率在5kHz-500kHz之间，C1=0.1uF, C2=10uF, R=100K, Rs=20欧姆，运放为AD817，运放供电+12,-12V。AD817输出有信号，经过C1//C2后，信号没有了。请问datasheet里的这个电路对C1,C2有什么要求？对信号幅度和频率有什么要求？