• AD9213 - SPI stalling CSB & Word Length

    The AD9213 datasheet (Rev. A), Page 73 implies that the Instruction Phase contains data bits to control the word length of the transaction as it states:

    "In addition to word length, the instruction phase determines whether the serial frame is a read…

  • RE: JESD204 IP for AD9213 and AD9172

    Hi Kumar_B,

    Up to this time, I could bring up the link between AD9213 ( which is on HTG-FMC-12ADC-16DAC) and VCU128 FPGA kit and passed some test modes in AD9213 but still got some little trouble. If you need my support, please contact me through:

    email…

  • EVAL-AD9213 Output Data Inversion

    Hi,

    For the EVAL-AD9213 Board I can see from the schematic that the Differential Data Output Lanes are as follows:

    Lane 0: Normal

    Lane 1: Normal

    Lane 2: Inverted

    Lane 3: Inverted

    Lane 4: Normal

    Lane 5: Inverted

    Lane 6: Normal

    Lane 7: Inverted

    Lane 8:…

  • AD9213 no system and board view

    I am using an ad9213 eval board and have installed ace(1.24.3095.1398) and plug-in for it on a window machine. The ace software can detect the eval board but after I double clicked the icon, the system view is empty. I double clicked on the AD9213-10GBEZ…

  • RE: AD9213 NCO multi-chip synchronization

    Hi Doug,

    Thank you for your efforts.

    Currently, our product is not yet released, development is continued.

    To be able to use NCO sync during development, we temporarily switched to sampled SYSREF. As I wrote, in this mode, NCO sync works, and so far we…

  • RE: AD9213: Test Pattern Incorrect

    Hi Mark,

    Could you tell me which PLL did you use for the GTY transceiver, CPLL or QPLL? I'm using the same HTG board as yours. In my case, when I used CPLL, I saw that the CPLL did not lock, but the QPLL did. However, when the QPLL locked, I did not see…

  • AD9213 test mode issues

    Hi experts, 

    I have a EVAL-9213 board to do some test. Some test modes in 9213 were not worked very well.

    For exmple, i want send user data from register 0x558 to 0x55f, but 9213 can't work.

    Some registers configurations were as below:

    0x0000 --> 0x81…

  • AD9213 Evaluation

    Hi there,
    We have purchased the AD9213-10GEBZ evaluation board and ADS8-V1EBZ for ADC Characterization.
    I have set up with me and was trying to use ACE Software as mentioned -> https://wiki.analog.com/ad9213
    But we are interested in capturing ADC…
  • RE: Sample clock for AD9213 and 9172 on Hitech Global board

    Hi, it's not clear whether you found the answer to your question. This hi-tech global board block diagram is incomplete. There is another clock gen IC on the board, the adf4371. So, the HMC7044 generates the ref clocks for FPGA JESD204B tranceivers, the…

  • Queries regarding AD9213 during the development of FPGA reference design

    Dear Team ,

                        I am trying to bring up AD9213 on hitech global card ( http://www.hitechglobal.com/FMCModules/12-bitADC_10Gsps.htm) along with VCU118.

    As a start I am developing the FPGA design and I am observing AD9208 dual_ebz VCU118 reference design as…