• High speed DAC AD9176

    Hi, I am looking for DAC to work at a sample rate of at least 10 Gs/s. I found AD9176 but the datasheet mentions it works at a sample rate of 12.6 Gs/s with interpolation. Does that mean the actual input signal bandwidth cannot be 6 GHz (as it uses internal…

  • AD9176 Mode 2

    Hello,

    I am trying to use the AD9176 + ZCU102 reference project but I want to use all 3 channels per DAC, so I changed the mode in config.tcl from the default of 04 to 02. Mode 4 works fine but mode 2 errors out when building the block design. I have…

  • ZCU102 AD9176 on FMC1

    Hello,

    I am using the latest master branch of the fpga and linux repos as it seems the dual-channel support for the AD9176 was added in the kernel driver after the 2019_r2 release. I have built the BOOT.bin, Image, and system.dtb and had no issue testing…

  • RE: AD9176: ACE could not find AD9176-FMC-EBZ

    Hello,

    I Could access AD9176-FMC-EBZ correctly when I use "DPGLite".
    I removed "DAC Software Suite" and removed all driver which are installed with "DAC Software Suite".
    And I removed ACE and the drivers.
    After that, rebooted…

  • AD9176 Spurs

    I made a few boards with a ad9176 which we have used pretty well for the past few years.

    During early testing we noticed that dac0 had spurs which were about 52dbc below the level of CV signal we were putting out. We also noticed that dac1 was about 4…

  • AD9176: Output with Spur

    Hello everyone 

    I use AD9176 for signal generation to 3 GHz and I used 12GHz Clock for DAC. I have problem wit frequency 1GHz + 1KHz when I used JESD. when I used NCO only mode , the out put is perfect but when I use Jesd data at frequency 1GHz DAC out…

  • RE: AD9176 Equalizer setting

    Assumed answered offline.

  • RE: AD9176 Class 1 LMFC delay in single link mode

    Hello, Your understanding is correct.  However, if you adjust LMFC_delay to an improper value, it can lead to this sort of behavior. Be sure to follow the procedure outlined in the "Link Delay Setup Example, Without Known Delay" section of the data sh…

  • AD9176 Data Ready IRQ

    Hello,

    I'm using the AD9176 in a custom board. I intermittently get a DATA_READY IRQ (Reg 0x024 = 0x08) and I can't send data across the JESD link.

    I find that if I reset the digital interface (0x100 = 1->0 transition), the IRQ is cleared and…

  • AD9176 SYNC_ROTATION_DONE Doesn't complete

    9176 didn't output. Register 0x03A, Bit 4 kept always 0. This means it didn't sync.But the 204B link had succeeded(sync equals to 1,and FPGA has tansported data).

    Anyone can help me,i will appreciate it greately!