• AD9163 both lane fifo full and empty are asserted

    hello, I am debuging the AD9163 on my board. Now the syncout was never get high. And both lane_fifo_full(REG 0x30C) and lane_fifo_empty(REG 0x30D) are get HIGH.

    Can somebody give me a help?

  • The thickness of the AD9163 package

    Hello,

    I have a question from our customer about the thickness of the AD9163 package.
    The maximum height from the bottom of the ball to the top of the package is 0.95mm which is described in the figure-141 of the datasheet.
    This customer wants to know whether…

  • AD9163 datasheet can't understand

    Datasheet of AD9163, Rev.d, page 67, the explanation of 0x604 bit 1 is shown as followed:

    (Optional) read the boot loader pass bit in Register 0x604, Bit 1 = 0b1 to indicate a successful boot load (private).

    What's the meaning of 0b1 ?

  • AD9163 DLL can't lock

    I am using AD9163. The dac clock is 400Mhz. I used an oscilloscope to observe the 400MHz dac clock is right.

    But the context of REG 0x092 bit0=0, which means DLL is not locked.

    What can I do next to figure out this issue?

  • RE: A10SoC+AD9163-FMCC-EBZ Boot/linux problem

    You don't need to compile u-boot from scratch. Regarding the image please use the latest image form here:

    wiki.analog.com/.../zynq_images

  • 关于AD9163的配置问题

    我在使用AD9163的时候遇到JESD204B的SYNC信号周期性拉低。通过读寄存器值如图,发现REG470和REG471都为0xFF,而REG472始终为0.不知有谁知道是什么原因?该如何解决。

    我配置基本参数为DAC速率6G,6倍插值,JESD204B线速率5G。L=8,M=2,F=1,S=2.SYSREF=3.90625MHz.

  • RE: AD9163 writing ACC_MODULUS and ACC_DELTA registers seem to have no effect in Modulus NCO mode

    Hi Mohammed, We are testing approximately the same way: triggering a scope on a 1pps pulse that is locked to the DAC clock, and check if the phase of the carrier is fixed, and not moving (while using a carrier freqeuncy that is exactly a multiple of 1Hz…

  • RE: AD9163 Start-Up sequence

    What's the freq of ADF4355 output clock?

  • AD-DAC-FMC-EBZ with AD9163 bring-up

    Hello Everyone,

    I hope you are all doing great! 

    I am new to AD evaluation platforms and will first time use the Linux image on the following setup: 

    HW: A10SoC+AD9163-FMCC-EBZ (Eval-AD916x) 

    HDL: AD-DAC-FMC-EBZ 

    config.tcl: AD9163 mode:08 (set params(AD9163…

  • AD9163 参考设计 输出电感选择咨询

    参考 AD916(1,2,3,4)-FMCC-EBZ - Evaluation Documentation (Rev. C) 原理图,下图是芯片输出端配置,270nh电感根据bom 是0402af-271,自谐振频率只有不到1G,那么芯片在1G以上工作频段时,这个电感是容性是否有问题?这个电感感值和特性如何选取。另外旁边的49.9欧电阻是什么作用