• AD9162 - Configuration


    Currently I am working with AD9162. Wanted to check these points.

    1. My configuration

    * DAC rate= 9.2GSPS

    * Interpolation factor = 8

    *Number of Lanes = 8

    *Data rate= 1.15 G

    *Lane rate= 5.75 G

    *Bandwidth available = 0.529 G

    *Mode = subclass zero


  • AD9162 CLK INPUT

    The AD9162's CLK INPUT (datasheet p78) is described as being able to be connected to a single-ended clock source.

    What is the circuit configuration for connecting to a single-ended clock source?

    Is it possible to input a single signal directly to…

  • problem to create square wave output with AD9162

     I used AD9162 to generate the square wave. However, during the texting procedure, I found when the frequency range exceed 1MHz, the wave shape started to be mild, or distortion. And the distortion became even harder when the square wave’s frequency increased…

  • AD9162 output issue


    If we set the NCO frequency to 1.2GHz and send data from the FPGA, the following waveform is output.
    The result we want is a single tone pulse at the 1.25 GHz point.
    Changing the JESD204B data has a pulse at the desired point.
    However, it produces…

  • AD9162 not passing CGS on some devices

    Hello.  I have a PCB design with 8 DACs (AD9162) and I occasionally have a problem establishing a link with one or more of the devices.  I have posted about this before, but I now have more details that may be helpful.

    I ran a PRBS test and took a "snapshot…

  • RE: AD9162 Inconsistent JESD Link Initialization

    If I am using the ADS7-V2 to provide the necessary clock, what else could the problem be?  It sets up correctly maybe 20% of the time.

  • RE: AD9162 does not achieve CGS anymore

    Hello Del.  Did you have a chance to review my submission regarding the PRBS test? 

    See below:

    I ran a "snapshot" test of a working DAC versus a non-working DAC and the results were as follows:

    The transmit side is sending 0xBCBCBCBC.  Writing…

  • RE: AD9162 : Bandwidth calculation of interpolation filter


    Each half-band filter will reduce bandwidth by 1/2 plus and additional 10%. Consecutive (serial) filters reduce BW by another 1/2.


  • RE: AD9162 Harmonics

    Thanks for the update!

  • AD9162 : ACE can not operate AD9162-FMCC-EBZ


    I have a trouble of ACE when connected to AD9162-FMCC-EBZ.
    The ACE find the AD9162-FMCC-EBZ as AD9162-ADF4355-FMCC-EBZ.
    But ACE can not connect to this evaluation board.
    ACE version is "1.17.2873.1284" and AD9162 plug-in is "1.2019.20300",…