• RE: About AD9161 EVB

     Refer to your other post:  About AD9161 EVM Kit 

  • RE: About AD9161 EVM Kit

    I've gotten no any answer, so I did not use HMC849.

  • RE: AD9161

    No, AD9161 doesn't support down to DC. 

    for DC support, please use AD9166. 

  • I used the DAC_fMC_EBZ and EVAL-AD9161 validation boards in HDL-2019_R2. When I use DDS driver data in DAC_tPL_CORE, AD9161 can give the correct frequency. But when using DMA to transfer data, the frequency is always incorrect.

    I used the DAC_fMC_EBZ and EVAL-AD9161 validation boards in HDL-2019_R2.

    When I use DDS driver data in DAC_tPL_CORE, AD9161 can give the correct frequency.

    But when using DMA to transfer data, the frequency is always incorrect.

    The IQ data in memory is…

  • When I used the AD9161 official verification board, the DAC SYNC signal could not be connected to the FPGA at the same time. According to the data, you only need to connect SYNC_N to the FPGA.

    When I used the AD9161 official verification board, the DAC SYNC signal could not be connected to the FPGA at the same time. According to the data, you only need to connect SYNC_N to the FPGA.

    But the code in the official HDL library dac_FMC_EBZ does…

  • RE: Is it possible to synchronize the outputs of two AD9161-FMCC-EBZ (subclass 1)?

    Hello,

    Assumed that his has been answered offline. Please let us know if this is not the case.

  • When I used the AD9161 official verification board, the DAC SYNC signal could not be connected to the FPGA at the same time. According to the data, you only need to connect SYNC_N to the FPGA.

    When I used the AD9161 official verification board, the DAC SYNC signal could not be connected to the FPGA at the same time. According to the data, you only need to connect SYNC_N to the FPGA. But the code in the official HDL library dac_FMC_EBZ does…

  • RE: AD9161 SYSREF_PHASE Register

    Hi,

    In my system fpga xilinx us+ and ad9164 the sysref is distributed by ad9508 such us the evb. I read the 0x37 and 0x38 registers and the value obtained are fc0, fe0 or f80 (after different power on). Are these values goods for subclass 1 sync or there…

  • Mix-Mode in AD9161

    It is mentioned in the AD9161 datasheet that AD9161 can support up to 7.5GHz RF in Mix-Mode,but now the output signal can only access 6GHz in Mix-Mode(0x152 bit[1:0] is 0b01).
    There is too little mention of Mix-Mode in the document, how can I use it?

  • Mix-Mode in AD9161

    Hi all,

    It is mentioned in the AD9161 datasheet that AD9161 can support up to 7.5GHz RF in Mix-Mode,but now the output signal can only access 6GHz in Mix-Mode(0x152 bit[1:0] is 0b01).
    There is too little mention of Mix-Mode in the document, how can I use…