• AD9148

    AD9148 output capacitance?

  • AD9148-EBZ - FMC Adapter, Latency

    Hi everyone,

    Here it says that the AD-DAC-FMC is (only?) compatible with DPG2 daughter boards, whereas the AD9148-EBZ is DPG3 compatible. Comparing the Schematics of both boards I cannot see any reason why the AD9148-EBZ and the AD-DAC-FMC should not…

  • Using Temp Sensor of AD9122 and AD9148

    How accurate is the temperature sensor on the AD9122, AD9146 or AD9148 Dual and Quad DACs?

  • RE: DCI Delay change in AD9148


    I moved this question about the AD9148 to the High-Speed DACs community.  Please continue the discussion here.



    EngineerZone Community Manager

  • RE: AD9148-Maximum rate?

    The DAC clock is fed directly to the 4 DAC output stages.  All of the DACs update at the same time, and all will be running at 1Gsps (or whatever the clock rate is). 

  • RE: AD9148咨询

    先参考一下 AD9148的示例代码,看看软件配置是否有问题


  • AD9148 VDD power consumption

    In the AD9148 datasheet there is the list of all VDD connections (AVDD33, CVDD18, IOVDD and DVDD18) with a typical and a maximal value.

    Is the maximal value the absolute maximum power consumption of the supplies or is this in a specific context ?

  • AD9148: Unused channel / Unused pins

    The REFCLK/SYNC input does not need to be used. Can this input be left floating
    or what termination is otherwise
    Also Port B is not being used, can these inputs be left floating?


    You can float the REFCLK pins when you drive…
  • AD9148使用问题

    目前系统有用到一个DAC AD9148,想直接输出RF信号,所以后面没有接混频之类的电路,由于I/Q输出,现今想请教AD9148内部NCO的下一级 “PHASE CORRECTION”功能相位调整两路叠加会不会对我输出的I/Q信号由影响?是否可以关闭该功能?关闭后会有什么影响?谢谢!

  • AD9148 "Data Rate" Synchronization mode - datasheet bit definition errors

    AD9148 "Data Rate" Synchronization mode - datasheet bit definition errors

    Referencing the AD9148 Datasheet[1], the SPI register table and datasheet text are contradictory with regards to the proper register setting for selecting the "Data Rate…