AD9148 output capacitance?
Here it says that the AD-DAC-FMC is (only?) compatible with DPG2 daughter boards, whereas the AD9148-EBZ is DPG3 compatible. Comparing the Schematics of both boards I cannot see any reason why the AD9148-EBZ and the AD-DAC-FMC should not…
How accurate is the temperature sensor on the AD9122, AD9146 or AD9148 Dual and Quad DACs?
I moved this question about the AD9148 to the High-Speed DACs community. Please continue the discussion here.
EngineerZone Community Manager
The DAC clock is fed directly to the 4 DAC output stages. All of the DACs update at the same time, and all will be running at 1Gsps (or whatever the clock rate is).
In the AD9148 datasheet there is the list of all VDD connections (AVDD33, CVDD18, IOVDD and DVDD18) with a typical and a maximal value.
Is the maximal value the absolute maximum power consumption of the supplies or is this in a specific context ?
目前系统有用到一个DAC AD9148，想直接输出RF信号，所以后面没有接混频之类的电路，由于I/Q输出，现今想请教AD9148内部NCO的下一级 “PHASE CORRECTION”功能相位调整两路叠加会不会对我输出的I/Q信号由影响？是否可以关闭该功能？关闭后会有什么影响？谢谢！
AD9148 "Data Rate" Synchronization mode - datasheet bit definition errors
Referencing the AD9148 Datasheet, the SPI register table and datasheet text are contradictory with regards to the proper register setting for selecting the "Data Rate…