Sorry, these are our design secrets and we can't reveal them to our customers without an NDA signed. Please contact our sales team directly. The will be happy to help you out with this request.
How accurate is the temperature sensor on the AD9122, AD9146 or AD9148 Dual and Quad DACs?
The datasheet for the ad9146 is not very clear on how to change the range on the Auxiliary ADC such that the temperature range can be modified. In particular in the datasheet http://www.analog.com/media/en/technical-documentation/data-sheets/AD9146.PD…
Hello!I have a few questions about AD9146 power-up time.This DAC has 260 ms power-up time.Why it's so much?Is it independent time (of operating mode, operating conditions, etc)?Can I reduce this time by DAC PLL turn off?
We are surveying dual channel 1GSPS DAC for my project of network analyzer.
But I have some questions on AD9146.
We plan to generate DC~250MHz I/Q signal randomly.
In AD9146 datasheet page7, I do not understand.
If we bypass…
What is it for?
AD9146 is dual and 16bits DAC. The interface width is 8bits width in BYTE mode, not 16bits. So Finterface is 1200Msps, DCI is 600MHz, Frame is 300MHz for both I and Q. And FDAC max is also 300Msps.
My question is about the PLL VCO N0 divider of the AD9146 DAC. In the data sheet (Rev.A page 22. PLL Control register 0x0D) are listed possible values for the N0 as 1, 2, 4 and 4. Is 4 realy the maximum value of N0 or just a typo? Could it be 8?