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(1) If I enable the Premodulation and set HB1 and HB2 to mode 1, do I get the signal x(t) = I(t)cos(2*PI*f*t) - Q(t)sin(2*PI*f*t), f = 125 MHz with 4 x interpolation at the I-DAC output, and if not, how do I setup AD9146 in order
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Hello! I have a few questions about AD9146 power-up time. This DAC has 260 ms power-up time. Why it's so much? Is it independent time (of operating mode, operating conditions, etc)? Can I reduce this time by DAC PLL turn off?

AD9146 is dual and 16bits DAC. The interface width is 8bits width in BYTE mode, not 16bits. So Finterface is 1200Msps, DCI is 600MHz, Frame is 300MHz for both I and Q. And FDAC max is also 300Msps.

My question is about the PLL VCO N0 divider of the AD9146 DAC. In the data sheet (Rev.A page 22. PLL Control register 0x0D) are listed possible values for the N0 as 1, 2, 4 and 4. Is 4 realy the maximum value of N0 or just a typo? Could it be 8?