• Grounding plan for AD9144


    I'd like to know ground plane plan for AD9144.

    AD9144 doesn't have separated ground, AGND and DGND, but has GND only.
    Also AD9144 has EPAD, which should be connected ground.

    In case using AD9144 on analog and digital mixed board, I believe…

  • AD9144 fREF Bypass

    I'd like to use directly through CLK± (bypassed DACCLK).

    Which registers should I set to bypass PLL circuit?

    0x83=0x00 right?

  • AD9144: DMA + util_dacfifo

    We are using the AD9144 with a Microblaze core (based on hdl_2016R1) and Linux on a KCU105 and noticed several odd things. 

    1. ) We have derived the configuration from the provided FMCDAQ2 reference design. In the 2016R1  release the cyclic property for…

  • AD9144 FMC reference design


    Do you guys have reference designs for the AD9144-FMC-EBZ on the VC707 board or other xilinx boards that I can use to start with?  If so, can I use two AD9144-FMC-EBZ and plug them into the board? Also, does your reference design support multichip…

  • AD9144 CVDD / PVDD concerns

    AD9144 @ max DAC update rate

    According to datasheet rev A page 7 tables 3 and 4 -> DVDD, CVDD and SVDD should be increased to 1.3V BUT  table 1 (p5) indicates for CVDD and PVDD  max range 1.14 – 1.26V


    On top of this table 64 (p63) note 2 we can find…

  • RE: kc705-DAQ2 eliminate DAC ad9144 from FPGA design


    Thank You!!

    Is process to create a new one complicated? 

    I guess Vivado version in github is for 2020.1 whereas i was using Vivado version 2018.3

    I tried copying some missing *.tcl files but encounter issues. Which are the files i need to update??

  • AD9144 + AD9375 on ZC706


    I would like to connect the AD9144-FMC-EBZ together with the AD9375 to the ZC706 card.

    1) Is it possible to connect and activate both cards in parallel?

    2) Do you have Matlab example to control the AD9144?

    3) What files should I put on the SD card…

  • ADL5567 match with AD9144

    Hi I would like to understand how should I better match ADL5567 with DAC AD9144 as the source. I would like to achieve impedance matching and still keep DAC compliance voltage within specified limits. BTW, what is the maximum compliance diff peak-to-peak…

  • AD9144 JESD204B max speed

    According to the datasheet rev A page 7 table 4 max JESD204B speed with oversampling is 2.76 Gbps

    1) Is it maximum speed per lane? (AD9144 has 8 lanes)

    2) Is it before or after 8/10 bit encoding?



    hiii sir...this is vinay. I am using AD-FMCADC4(AD9680 & AD9144) with kcu105 evaluation board. this is the first time am using this board. How to configure the ad9680 with jesd204b standard and also it gives baseband data. how to capture the baseband…