• AD9144 - Does the AD9144 support deterministic latency/multi-chip synchronization?

    Yes, the AD9144 supports JESD204B Subclass 0 and Subclass 1 operations for deterministic latency.  Subclass 1 provides synchronization to within ½ a DAC clock period and requires a SYSREF± signal to achieve this latency variation.

  • AD9144 - What JESD204B SERDES modes are available on the AD9144?

    The AD9144 has 4 DACs and 8 available SERDES lanes with flexible interface configurations to meet various customer needs.  The table below shows the transport layer JESD204B link parameters for each mode supported.  These parameters are defined per link;…

  • FMCDAQ2 AD9144 ILA error

    hello!

    I am using the AD9144 of FMCDAQ2. I have configured the map register of AD9523-1 and AD9144 through SPI. Successfully produced refclk and sysref.
    However, an ILA error occurred during the configuration of the AD9144. I use mode 4 single link mode…

  • AD9144

    AD9144

     

    I am trying to set up the AD9144 DAC registers but there are some questions that I would like answered and I was hoping that someone in the community has had previous experience with the AD9144 DAC registers.

     

    I will list the questions that…

  • AD9144

    Hi sir,

    I would like to use a quad high speed DAC to drive two IQ modulator ADL5375.

    I need to send 130Ms/s to each DAC input. I need DAC oversample x2 the inputs, so each DAC frequency sampling would be 260Ms/s.

    Both IQ pair must be perfectly synchronous…

  • AD9144 revision

    Hi,

    I have build a system using AD9144 JESD DAC.

    The version populated on my PCB is rev 0x02. (Read from register adress 0x06 field DEV_REVISION).

    So far, I have been using datasheet rev 0, which also confirms that value.

    I recently downloaded an…

  • Change Sampling Frequency of AD9144 (FMCDAQ2)

    Hi,

    I am trying to set the sampling frequency of AD9144 to 2GHz. The default is 1GHz when the board is loaded with the provided Linux image.

    This is the sequence that I am using:

    1. I navigate to the devices directory using cd /sys/bus/iio/devices/

    2.…

  • ad9144 configuration

    hi sir. this is vinay. am using AD9144(DAC) interfacing with kcu105 fpga board. how to configure ad9144.

    i need 140 MHz output from ad9144...how to get this frequency from ad9144 sir...High-Speed DACs

  • AD9144 JESD issue

    Hi,

    I am having trouble with JESD link while using ZC706 along with AD9144.

    I have set up JESD inside FPGA which is configured as below:

    scrambling:off

    F=2, K=32, Subclass =0, line rate =4.32 Gbps,ref clock = 108MHz , M= 4, N and Np =16 and S =1

    I have…

  • RE: AD9144 Blanking State Machine behavior

    Hello! I have the same problem with AD9144. BSM enters blank state. How had you solved this issue?