• RE: AD9142a DAC output issues

    Hi ,

    DLL interface is enabled .

    Initially I used the OSERDES when I faced the issue .Later I replaced OSERDES with ODDR but no improvement .Finally I added the generated clock constraint and output delay constraint then it got worked .

    NOTE: O…

  • RE: AD9142A output spur issue

    Hello,

    Yes, this part needs to have the DCI and Data to be ready stable  before configuring the part,  pls check register 0x0E[7]  to confirm the DLL being locked.   also confirm 0x0D is correctly configured. 

  • AD9142A Byte Interface Mode

    Re-posting this question and there was no response earlier...........

     

    I am interested in learning more about the AD9142A byte-interface mode, before evaluating the DAC

     

    We plan to use 300MHz DCI clock with x4 interpolation. So the DAC shall be clocked…

  • AD9142A Byte Interface Mode

    Re-posting this question and there was no response earlier...........

     

    I am interested in learning more about the AD9142A byte-interface mode, before evaluating the DAC

     

    We plan to use 300MHz DCI clock with x4 interpolation. So the DAC shall be clocked…

  • AD9142A Vcm voltage


    Hey, we are using AD9142A, I want to set common voltage to 2.68 to drive ADRF6820_27. Is it possible to set 3.3V in between 50ohm resistors at differential inputs?

    Thanks

  • AD9142A FPGA Clock Issue

    Hi everyone 

    We have an issue about the clock network. We change our design from section 1 to section 2. Section 1 AD9523-1 clock gen send clock ad9122 and fpga. Section two we changed ad9523-1 with adf4351 and send clock to ad9142A. Should I send cl…

  • Inquiry about AD9142A function

    Hello,

    My customer is designing a board with AD9142A.

    They know that if the NCO of AD9142A is not used, it can transmit two different real signals to IDAC and QDAC.

    In this case, how much less is the output power compared to using the complex modulation output…

  • Fdac/8 modulation in AD9142A

    Hi,

    I am trying to use the NCO in the AD9142A as a Fdac/8 modulator. I use the following settings :

    - Fdac = 800MHz

    - Fdci = 100MHz (obtained form Fdac by a division by 8)

    - Interpolation = 8

    - DAC uses external clock directly (internal PLL clock multiplier…

  • AD9142a Spikes in sine wave output

    I am using an AD9142a evaluation board (AD9142a-M5375-EBZ Rev C) connected to a ZC706 evaluation board via an AD-DAC-FMC-ADP interposer card.

    I have created an FPGA design to generate a sine-wave.

    The AD9142a board has been modified as per the wiki to…