• AD9142A VCO


    I'm a DFAE in Japan. Our customer uses AD9142A. When fVCO is set 2.00GHz, is there anything you care about? He uses Automatic mode. We feel that there is no margin at 2.00GHz compared to 2.07GHz.



  • AD9142A NCO Mode Startup Sequence using External DAC Clock

    I am trying to configure the AD9142A DAC using SPI interface.

    I have derived the configuration sequence for NCO mode from the Startup routine from the data sheet, yet I am not able to get any output.

    Procedure Followed:

    1. Provided stable DAC clock.

  • AD9142A Byte Interface Mode

    Re-posting this question and there was no response earlier...........


    I am interested in learning more about the AD9142A byte-interface mode, before evaluating the DAC


    We plan to use 300MHz DCI clock with x4 interpolation. So the DAC shall be clocked…

  • What is the Psi-jt for the AD9142A package (72-pin LFCSP)?

    The Psi-jt for the AD9142A package is 0.11C/Watt.

  • RE: AD9142a DAC output issues

    Hello Mourya,

    If the problem is solved, that's great. 

    1. I think that should be ok, but having the same type of hardware to generate the signals would probably create minimum slack. I haven't done in hardware comparisons to confirm.

    2. Ok

    3. Ok…

  • AD9142A output spur issue

    Dear Team ,

                        I am using two daughter cards on my customized ZYNQ(XC7Z030) board.

    daughter_card1 => It consists of two chips (one ADC chip (ISLA2145p0) and one DAC chip (AD9142a))

    daughter_card1 => It consists of two chips (two AD9142a chips ).

  • RE: Is an AD9142A linux software driver developed ?

    Hi Michael, I see that this request is already dated from 2016. Currently I am looking for the same. Before starting to develop this one by myself, has there been any work done recently on the AD9142A linux driver development? Before I start re-inventing…

  • Questions about the TXEN pin on the AD9142A


    I have a question about TXEN (Pin 6) of AD9142A.

    According to the data sheet, the function of this pin is
    H: Transmit Path Enable
    L trigger: three selectable actions
    And it is explained on Page 37 of 72.

    However, there seems to be no explanation…

  • AD9142a Spikes in sine wave output

    I am using an AD9142a evaluation board (AD9142a-M5375-EBZ Rev C) connected to a ZC706 evaluation board via an AD-DAC-FMC-ADP interposer card.

    I have created an FPGA design to generate a sine-wave.

    The AD9142a board has been modified as per the wiki to…