• AD9135/AD9136 - What is the max data rate the AD9135/AD9136 supports?

    The AD9135/AD9136 supports up to 2120MHz input data rate.  This allows customers to generate ultra-wideband signals used in applications like E-band microwave point to point and instrumentation.

     

    For more information visit the product pages:

    AD9…

  • AD9135/AD9136 - Does the AD9135/AD9136 support deterministic latency/multi-chip synchronization?

    Yes, the AD9135/AD9136 supports JESD204B Subclass 0 and Subclass 1 operations for deterministic latency.  Subclass 1 provides synchronization to within ½ a DAC clock period and requires a SYSREF± signal to achieve this latency variation. 

     

    For more…

  • AD9136

    The ADI App Note "Validating ADI Converters inter-operability with Xilinx FPGA and JESD204B IP" states that "Each converter device requires its own FPGA firmware." Can I get the FPGA firmware source code for the AD9136? Also, is it OK to violate the SYSREF…

  • AD9136

    Hi,

    I am a novice at DAC. Now, I am planning to use FPGA and DAC to make a function generator which only has two functions. One is generating a square wave with the frequency up to 1 GHz. Another is randomly generating pulses which the pulse width is…

  • AD9136

    Hi

    Has anyone had a problem with the AD9136 configuration? I configure register 0x453 to descramble data from JESD, but it does not descramble them. ADC processes clean data. When I read this register, the data in it is ok (0x80).

    I am sending configuration…

  • AD9136 checksum error

    hi,

        I'm using the AD9136 FMC EZB card, when I configure the AD9136 chip and then check the checksum state by read reg 0x472, the read out data always be zero(other regs have the data that I write in). Even though I write the checksum data traversal…

  • ad9136 FCHK0 calculation

    On the AD9136, SPI register 0x45D ("FCHK0"), how do I compute this value for the standard JESD204B CHECKSUM_MODE (bit 6 of register 0x300 = '0')?

    In googling around, it looks like you would just sum together the ILS registers (0x450…

  • AD9136 question

    Hi, all.

    I am going to use the AD9136 DAC that have interface JESD204B. I assume DAC sampling rate (fs) is 1.2288 GHz and JESD204B lane rate is 6.144 GHz

    I have read the datasheet and I have some question.

    1.

    The Board have clock generator (AD9520…

  • AD9136 output polarity

    Hello all,

    I am working on a new design using AD9136 and ADRF6720 parts.

    The connection between out0+/- of the DAC and I+/- of the modulator is straight but the out1 is "swapped" compare to the modulator Q+/-.

    So just to check that I understood…

  • AD9136-FMC-EBZ Schematic

    Hi,all.

     

    I am checking the PCB pattern connect of  AD9136 FMC EVALUATION BOARD.

     

    I can not understand the connect from the FMC to the SERDINx+/-.

    Is it typo?

    In the sheet 4 of 8, @ AD9136-FMC-EBZ RevB Schematic.pdf ,

    SERDINx+/- (FMC?) is cross…