• AD9122 Evaluation Board - running without ADI- AD9122 SPI program

    Hi,

    I have an AD9122 Evaluation Board connected to KC705. I want to run the card but without need to execute ADI-AD9122 SPI program (no usb cabel connected). Is there a way to make the card start after power up? I can write data to the card, but it won…

  • Can I use AD9122 Evaluation Board (AD9122-M5372-EBZ) without DPG2

    Is it possible to use  AD9122 Evaluation Board (AD9122-M5372-EBZ) with other Digital output cards rather than DPG2 from Analog device inc. Is the  AD9122 Evaluation Board only compatible with DPG2 ? 

  • How to interface AD9122-M5372-EBZ with Zynq ZC702?. I am new to AD9122 and ZC702.

    I have been trying to interface DAC AD9122-M5372-EBZ with Zynq ZC702. I find quick guide

    ftp://ftp.analog.com/pub/HSSP_SW/HSCDAC/Documents/AD9122/AD9122%20Evaluation%20Board%20Quick%20Start%20Guide.pdf

    and reference designed for ML605 with AD9122

  • Solder paste stencil and via tenting for optimal reflow of the AD9122 72-lead LFCSP (referencing EVAL-AD9122 and AN-772)

    I have reviewed AN-772 along with the layout (gerber and brd) files associated with the EVAL-AD9122 board.  We are currently using the AD9122 in a design, and have been having difficulties regarding voiding on the thermal paddle, significantly degrading…

  • AD9122 FIFO

    I am using the reference design and no-OS driver.

    I am running the system with "dac_dma_setup(fmcSel)" instead of "dds_setup(fmcSel, 1000000, 1000000)"

    If I read 0x12 of AD9122 from time to time, it is always 0x43;

    If I read 0x18…

  • AD9122

    ADF4350+AD9122+ADL5375

    I use ADF4350 generate 2600MHZ LO single_end to ADL5375 , the input of I and Q for AD9122 is a constant, then generate 1MHZ NCO low sideband  to modulate a the constant  , that is , the output of AD9122 is 1MHZ single frequency ,

  • Ad9122 data input

    1、Do N data input port and P data input port of ad9122 control IOUTN and IOUTP respectively?

    2、Is the IQ signal to be set up separately in FPGA, or only one channel of data will be created, and the data will be automatically divided into I channel and Q ch…

  • AD9122 offset freq

         Design requirement: Set the AD9122 TxDAC to output a baseband I&Q signal centered at 320M with 83M BWidth (320+/-42.5MHz) into an ADL5375 IQ MOD. The LVDS data input rate is 256Msps, alternate I&Q, equivalent to 128M complex data rate ( I+j*Q), centered…

  • fmcomms1 ad9122 fifo

    hi all,

    I am using fmcomms1 for a school project. For this project the latency from the transmitter-> ad9122 -> DAC ... -> ADC -> ad9643 is very important for our design, and this latency should be stable.

    Currently, we are using cross-correlation…

  • AD9122 DDS phase

    Hi,

    I'm testing a custom board based on fmcomms 1 and ZED. my application is sfcw ranging. i have below questions........
    the customization is instead of two adf4351, im using a single adf5355 to generate both tx and rx LOs.

    1. Does the DDS start with…