FAQ
Hello
I have a question about pin compatibility between AD9116 and AD9716, from our customer.
By the datasheet it looks like that these two devices has same package and function of pins.
He wants to confirm because the data sheet diagram was wrong before…
Hi y_suzuki,
Sorry for the delayed response.
We can only provide information that is in the datasheet. But we are currently gathering frequently asked parameters for post-release characterization and we will include your question.
For the meantime, you may…
We typically use a DAC with WRT_A, B lines but we want to switch to 1.8V logic.
We cannot find any DAC like AD9765 with silmutaneous update feature for 1.8V.
Therefore we are thinking about to use 6 AD9116 with a shared databus and sperate clk lines…
Question about the SPI timing spec of AD9116.
1. Could you please let me know the definition of tDV/tDNV using SPI timing chart?
- tDV (SCLK to Calid SDIO)
- tDNV (SCLK to Invalid SDIO)
2. Could you please provide Tr/Tf spec of SCLK/SDIO?
AD9116
How to realize bipolar output?I have not figured out this kind of application documents from AD9116.
I'm working on a design using the AD9116.
I would like to tie the power pins to:
I would then use 2.5v signals (Xilinx V6 LVCMOS25 outputs…
Hello,
I have a customer using the AD9116 and is looking for the transition times to and from the sleep and powerdown modes to normal mode. No transition times or timing diagrams are in the datasheet. The customer would like know these times for both…