How to realize bipolar output？I have not figured out this kind of application documents from AD9116.
Question about the SPI timing spec of AD9116.
1. Could you please let me know the definition of tDV/tDNV using SPI timing chart?
- tDV (SCLK to Calid SDIO)
- tDNV (SCLK to Invalid SDIO)
2. Could you please provide Tr/Tf spec of SCLK/SDIO?
I'm working on a design using the AD9116.
I would like to tie the power pins to:
I would then use 2.5v signals (Xilinx V6 LVCMOS25 outputs…
Someone by email asked me:
I have the AD9117 Evalboard along with the FMC adaptor board and is using it in conjunction with the Xilinx ML605 board.
Following the docs at:
I have a customer using the AD9116 and is looking for the transition times to and from the sleep and powerdown modes to normal mode. No transition times or timing diagrams are in the datasheet. The customer would like know these times for both…
We have built a prototype board using the AD9115 DAC and I’m trying to configure it using the SPI port and am having trouble. Here’s what I’m doing and what I’m getting:
thank you for your answer. There is no schematic but there is a block diagram like in attach file. Our aim is to change center frequency of the HMC899LP4 tunable filter.(Max. tunable supply +14V) We think of use high speed DAC(like AD9116)…
Can the AD9548 take 2.5V on the output driver supply AVDD3 pins (31, 37, 38, 44) in CMOS mode? The datasheet specifically mentions 1.8V and 3.3V, but we're wondering if there is any issue with driving it at 2.5V to interface with AD9116 better and that…
I have a question regarding the main DAC output of the AD9114 / AD9115 / AD9116 / AD9117.
Power is +3.3 V and for many reasons (cost, space, voltage supply and others) we need to get as much power as possible from the output stage to avoid an extra amplification…