• FAQ: Operation of AD8375 and AD8376 Digitally Controlled VGAs at Low Frequency

    Q.

    The frequency response plots in the AD8376 and AD8376 DGA data sheets show roll-off at low frequency. Is there any way around this?

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  • FAQ: What are the precautions to prevent latch-up on the AD8375?

    Q.

    What are the precautions to prevent latch-up on the AD8375?

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    A.

    The outputs of the AD8376 are open collectors that need to be pulled up to the positive…

  • RE: Queries about AD8375 OIP3 Measurement

    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
  • RE: Query about AD8375's Output Design

    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
  • how to design IF filter between ADL5801 and AD8375

    hello,

    I want to design a IF receiver board, the RF input  from 400Mhz to 900Mhz, 40Mhz bandwidth,tuneable,   i want to get 144Mhz IF signal,

    I select following chips

    ADL5801         downconvertor mixter

    ADF4350         LO

    AD8375           IF amp

    who can tell me how to design…

  • 关于时变增益控制响应时间

    你好!

        我现在正在选取VGA放大电路,之前选用的AD8375是数字控制的,增益控制响应(Gain Step Response)时间为5ns(我能找到的最短时间),不满足我们的设计要求。AD8351是模拟控制的,我不知道settling Time 是不是相应的增益控制响应时间2ns,即当控制电压从a Vb V后多长时间,输出信号才达到对应的放大后的值,是2ns吗?。如果工程师您有时间更短的VGA(最好小于1ns),麻烦推荐,我们需要的带宽为150MHz~450Mhz,放大倍数约为-4db~20db或更宽…

  • AD9265 cmos clock driver

    How can i interface AD9265 with CMOS single ended clock driver without using transformer ?

    do i need a clock driver ? actually i am driving my clock from FPGA cyclone V.

    Do you have any design file which interface this adc to cyclone V ?

    What differential…

  • Comment on Understanding How Amplifier Noise Contributes to Total Noise in ADC Signal Chains

    Hi Vishnu,

    I am sorry I didnt see this comment until now. The NSD for the amplifier is dependent on the design. The AD8375's architecture lends itself to a constant NSD of about 20nV/rtHz across frequencies. I am not sure that you can compare the NF…

  • Comment on Understanding How Amplifier Noise Contributes to Total Noise in ADC Signal Chains

    hi Umesh,

    The article is very informative.

    I have a doubt in the calculation of NSD for the VGA. You have taken the NSD as 20nV/sqrtHz (In AD8375 datasheet it is mentioned typically this value). Is there any equation to derive this value. In the…

  • RE: IF receiver

    thanks. i have some other question

    attached is my design circuit, can u give me some advice?

    1. for best performance, LO out of ADF4350 need more filter? how to design it?

    2. i don't know how to design the impedance match of ADL5801-> AD8375, AD8375…