• AD7938-6 parallel interface

    I have a test board with the AD7938BCPZ-6 part. I have it set up in byte mode. I have an FPGA that controls the read, write and conversion control signals. Every read cycle returns all 1's on the databus. I am operating the device using a 3.3V supply…

  • AD7938: FAQs

    When in byte mode, the AD7938 channel ID is read on DB4 to DB6
    when HBEN is high.

    How do you read the channel number when in Word Mode ?


    It is only possible to read the channel ID in byte mode.

  • AD7938 Quiet time

    We are using AD7938 for a multi-channel A/D conversion. I wanted to know what can be the implication of not fully respecting the minimum 30 ns Quiet time requirement ?

  • Quesion for AD7938 Throughput rate

    Dear Sir/Madam,

      In the datasheet of AD7938, Throughput rate is 1.5MSPS

      If it works in 8-channel single-ended inputs mode, Throughput rate of each channel is 1.5MSPS or (1/8)*1.5MSPS?


  • AD7938: Overvoltage at analog inputs

    We are using AD7938 CONVERTOR. The limit for analog inputs is -0.3V. In our
    application we could potientially go to -0.35, if we were to limit the current
    to say 3mA would this cause permanent damage?


    The part won’t damage however we…
  • AD7938 FPGA Input Channel Voltage

    Hello All,

    I am facing an interesting issue.  I have designed an RTL module with the AD938 A to D.  I am referencing an external source 4.096V I am able to read channels so I think my logic is correct. So, let's say I have channel 1 at 4 v  my reading…

  • AD7938多通道采样率疑问


        AD7938 手册上写的1.5MSPS采样率  ,实际应用种能到多少MSPS?

        如果用满8个通道同时采样,每个通道是1.5MSPS 还是(1/8) * 1.5MSPS ?

  • AD7745/6

    I'm trying to understand the register map.

    The data sheet for the AD7745/46 only shows registers 0x00-0x12.

    The Register Summary in the eval software shows 9 more and documents them 0x13-0x1B, and then extends all the way to 0x30 undocumented with…

  • RE: ADXRS646-EP Datasheet Figure 6

    Hi EVoyager

    it seems that there is a typo in the Figure 6, thanks for noticing. I will work with our editorial team to correct it. 

    From what I have been able to learn, through review of internal design documentation, there are process variation that causes…

  • ADP2127: Recommended footprint for 6-Pad Embedded Wafer Level Package [EWLP] (CN-6-1)


    Is there any recommended footprint from Analog Devices which I could use to generate footprint (in PADS Layout) for ADP2127ACNZ1.260R7 (6-Pad Embedded Wafer Level Package [EWLP], CN-6-1 package)?