• ad7768-1 pin mode question

    Hi

    I am using  ad7768-1 pin mode to read conversion data . There is little information on this in the data sheet and no Timing Diagrams.So as I understand it, I input 32 SCLK signals to the chip after receiving the rising edge of DRDY signal. In the dc signal…

  • ADI IIO trigger AD7768-1

    Hello,

    I'm working on a zedboard-AD7768-1 project.  I've seen that the single-shot acquisition via /sys/bus/iio/devices/iio:device0/in_voltage0_raw is working.  I would like to get the buffered readings.  Almost all literature I've read about buffered…

  • AD7768-1 cannot be recognized by IIO oscilloscope

    Hi,

    I'm using an AD7768-1 board with zedboard.

    • I have installed the latest Kuiper image

    • I've copied the uImage and BOOT.BIN and devicetree.dtb to the main BOOT folder

    • Kuiper image is booting up but the IIO oscilloscope cannot detect my…
  • Interfacing the AD7768-1 to a microcontroller

    Dear All,

    I am designing a ADC system using AD7768-1 and a microcontrollr which has a SAI peripheral. I saw in the forum, there were some examples for the AD7768-4 connecting with SAI. I have a solution, but I wonder if it works, would you please help…

  • Problem in AD7768-1 Zedboard Linux setup

    Hello Everyone and Good day.

    I'm currently trying to bring-up the EVAL-AD7768-1 FMC board in my Zedboard, and so I used the reference design from ADI here.  Both hdl and meta-adi repositories are used for this.  There is an existing .dts file for ad77681evb…

  • ADI's New 24 bit, Single Channel, Sigma Delta ADC with Power Scaling - The AD7768-1

    The AD7768-1New is a low power, high performance, Σ-Δ analog to-digital converter (ADC), with a Σ-Δ modulator and digital filter for precision conversion of both ac and dc signals. The AD7768-1 provides a single configurable and reusable data acquisition…

  • EVAL-AD7768-1 external power

    Hi,

    What are the power requirements on the J6 connector (pin voltages) to power the EVAL-AD7768-1 when the VINSEL jumper is set to A (i.e. power input from Connector P6)?  Does both J6 and J5 require the various power rails to have the EVAL-AD7768-1 fully…

  • ad7768-1 引脚控制模式问题

    我在用Verilog编写ad7768-1的引脚模式读取转换后数据代码。我看官方给个数据手册中这方面的东西比较少,也没有具体时序,我就按照我所理解的在收到DRDY信号的上升沿后给芯片32个SCLK信号输入。在用直流信号测试的时候还是读的比较准的,但偶尔会读出错误数据,而在用正弦信号测试的时候就会产生很多的错误。

    下边是我读一次数据的时序图

    请问我是时序方面哪里做错了吗    各位有没有这方面的代码参考呢

  • About EVAL-AD7768-1

    hi

    when i use EVal-AD7768-1, can i connect the Ain+ and Ain- together to test the noise of the ADC? would you pls tell me how to test the noise of the EVAL board? thanks!