• AD7762 - Suitable FIFO buffer for interfacing

    Hi,

    Can someone please recommend a fast high-speed PARALLEL INPUT FIFO buffer with a serial output using SPI that I can use to interface with the AD7762 ADC?

    https://www.analog.com/media/en/technical-documentation/data-sheets/AD7762.pdf

    I am looking for…

  • RE: AD7762 Timing at parallel bus

    Hi,

    it seems a problem to answer the questions.

    According to my tests, it looks like the first edge of Iclk after /CE went active registers the data on the bus.
    I found a workaround to meet the timing by delaying /CE for the AD7762 only with some 74HC gates…

  • AD7762 Register read and write in a nutshell

    Hello,

    to be clear, please are my statements correct:    
        
    All registers are not direct readable, i.e. it is not possible to read the content of a register by writing a register address to the chip followed by a read operation.
    All registers are write only…

  • AD7762 input maximums when power OFF

    Hi,

    I discovered some issues with my AD7762 design and I don't have enough info from the chip to know how to tackle it.

    In summary, I need to have my circuit capable of receiving the full input signal while not being powered ON without being damaged…

  • RE: AD7762 MCLK buffering requirements

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  • RE: Your conditions of AD7762

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  • RE: Question for your AD7762

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  • RE: AD7762 Analog DC Input Current

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  • RE: Use as daisy chain AD7762

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  • RE: AD7762 : Settling time after disabling PD

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