• AD7760


  • AD7760

    According to the AD7760 data sheet,,

    Combined with the relationship between signal to noise ratio and bit number,

    By calculation, the AD7760 did not really reach 24 bits,I would like to know what circumstances can achieve 24 bits?Did i understand…

  • AD7760

    Dear Sirs,

    I'm interfaceing an AD7760 to an FPGA and I experienced that, during setting a configuration register resp. reading status registers, the ADC is signaling ADC-results by pulling DRDY low. Is there no arbitration? In the output stream Status…

  • AD7760


    could you please anyone give the answer,   iam using AD7760 interfacing with pic32 microcontroller, the DRDY is always low?

    can any one send me the source code in c?


  • AD7760

    Currently I am using FPGA to develop AD7760, first put the data in sram (IS61WV102416ALL), and then sent to the computer via usb, but the data recurrence,why?


  • AD7760采样



  • AD7760 input protection?

    Hello AD forums,

    I have a question that I hope one of you may be able to help with ...

    I have an AD7760 evaluation board (eval-ad7760) and would like to know if there's some kind of input over-voltage protection on this board ... I've looked at the…

  • CED1z with AD7760


    I am trying to use CED1z with AD7760. For communication, I ma using provided LabVIEW software. Unfortunately, communication is handled through DLL, which is quite unreliable and often whole program freezes. Would it be possible to get source code,…

  • AD7760 MCLK


    I would like to know about AD7760 MCLK.

    Does AD7760 require sin wave clock ,basically ?

    Datasheet says MCLK input amplitude is 5V typ.

    Squre wave is more better I think.

    Is Internal threshold mid of DVDD ?

    The clock duty will be changed by threshold…

  • AD7760 Undersampling

    Is it possible to do undersampling with the AD7760? I would prefer to sample a carrier in the range from 2MHz to 4MHz (fixed) with a bandwidth of 100kHz.