• RE: AD7690 Readings / Output code

    Hi Anthony,

    I'm not sure why you would want to use the AD7690 single-ended as you lose half the range effectively making it a 17 bit converter? The AD7686 is pseudo-differential input which means it is designed to have the IN- connected to ground. This…

  • AD7690: Stuck bits

    I got some samples of the AD7691 and connected it to the SPORT of an
    ADSP21161N. I found a strange behaviour of the ADC and I have no idea why. I
    connected a constant voltage to the positive input of the device (the negative
    input is…
  • AD7690的SNR

    我在计算过采样对AD7690 SNR的改善。

    公式如下。在我的应用中,带宽为150Hz。但我不确定N的值。对于AD7690,N应当是18位还是16.6位?

  • RE: About AD7690 ADC

    Hello Catherine,

         Thanks for your reply. We are still facing the count fluctuation problem  with AD7690.

    We are reading the data through the timer interrupt function. The timer interrupt will happen for every 50 micro seconds (For reading the 18 bit…

  • Comment on AD7690的SNR

    对此,你应使用有效位数16.6。

    如果带宽最大值为150Hz,那么你可以得到300Hz的输出速率。因此,OS比为400kHz/300Hz = 1.33E3,过程增益为10log(1.33E3) = 31.25dB。这可能无法完全实现,因为ADC也会有一定的1/f噪声,它会影响SNR。

  • RE: SPORT - gate the clock?

    Hi Dan,

    Is there any way to have the SPORT clock stop when the transmission is complete?  Some A2Ds don't like free-running data clocks.

    In my case, I need to connect an AD7690 to an ADSP 21368.  Since it needs 18/19 bits, I can't easily use the SPI…

  • 微弱信号输入情况下AD7690采集误差较大问题请教。

    现在有个项目,传感器信号输入为-5~+5v, 经过AD8475进行0.4倍衰减并移位到2.5伏后,再差分进入AD7690进行数据采集。当该传感器输入电压很小时,AD7690差分数据采集偏差很大;但如果传感器输入电压较大时,AD7690差分数据采集很准。  

    具体如下表:

    AD7690输入差分电压               AD7690输出结果

         0.4mv                                          2mv附近跳动,最大到5mv

         1mv                                             4mv附近跳动,最大到8mv

         2mv                                             比较准确

         3mv                                             很准

         。。。                                         很准

    电路连接是参考AD8475与AD7690的数据手册中的推荐电路的…

  • AD7690 SPI Mode SDo High Impedance State

    I would like to make sure the AD7690 SDO pin stays in high impedance when I do
    not need to use it?

     

    SDO is high impedance whenever the ADC is not selected, i.e. when SDI is high.
  • RE: code of the test pattern of   AD7960?

    Hi Maithil,

    I also want to verify my FPGA Design with the test patterns of ad7690, so could you please send me informations about the generated random code?

    Thanks

    Björn

  • Digital Logic instead of a Microprocessor

    Is it possible to control a AD7690 in the 3-Wire CS Mode (Rev. C, Figure 34) by using the CNV and CNV and SDO  lines with only simple digital logic rather than using a microprocessor?