I'm not sure why you would want to use the AD7690 single-ended as you lose half the range effectively making it a 17 bit converter? The AD7686 is pseudo-differential input which means it is designed to have the IN- connected to ground. This…
Thanks for your reply. We are still facing the count fluctuation problem with AD7690.
We are reading the data through the timer interrupt function. The timer interrupt will happen for every 50 micro seconds (For reading the 18 bit…
如果带宽最大值为150Hz，那么你可以得到300Hz的输出速率。因此，OS比为400kHz/300Hz = 1.33E3，过程增益为10log(1.33E3) = 31.25dB。这可能无法完全实现，因为ADC也会有一定的1/f噪声，它会影响SNR。
Is there any way to have the SPORT clock stop when the transmission is complete? Some A2Ds don't like free-running data clocks.
In my case, I need to connect an AD7690 to an ADSP 21368. Since it needs 18/19 bits, I can't easily use the SPI…
I also want to verify my FPGA Design with the test patterns of ad7690, so could you please send me informations about the generated random code?
Is it possible to control a AD7690 in the 3-Wire CS Mode (Rev. C, Figure 34) by using the CNV and CNV and SDO lines with only simple digital logic rather than using a microprocessor?