• AD7676 with AD8021 drivers

    We have a telemetry deck that uses AD8021s as a single-ended to differential driver for an AD7676 PulSAR ADC as documented in the AD7676 data sheet.  We want to make sure that when using +/12V supplies for the AD8021s, their inherent current limiting is…

  • AD7676 interface to ADSP-2136x

    In EE248 and in the attached SW it says that "the SPORT must be configured initially for a serial word length of 15 bits". After reading two words from AD7676 the word length is then modified on-the-fly to 16 bits.

    There's not given any explanation…

  • AD7676 interface to ADSP-2136x

    In EE248 and in the attached SW it says that "the SPORT must be configured initially for a serial word length of 15 bits".

    After reading two words from AD7676 the word length is then modified on-the-fly to 16 bits.

    There's not given any explanation…

  • RE: Is it a real breakthrough to remove the input voltage range limitation of IA

    Hi Jebas,

    PLease see attached list of the ADIs some of the latest differential ADCs with less tahn 2 LSB INL error. I have short listed this ADCs for DAQ systems application. I have included in the column on the file the throughput rate and full power…

  • RE: SHARC(21366)  SPI Emulation using Flag pins

    Hi,

    It would be hard to emulate SPI using Flag pins as you need to maintain timing relationship between clock and the MISO ,MOSI. You will need to toggle the flag pins everytime the Clock and data needs a state change. This becomes cumbersome. You could…

  • AD7656 power supply anomaly

    Hi all -

    We are using two AD7656 6-channel 18-bit converters on a new product.  We have an unexplained observation on the power supply of the prototype boards.  Here's an overview:

    AD7656 power supplies (all voltages nominal)

      VDD = +15

      VSS = …

  • RE: 基于SHARC 处理器的系统设计与调试技巧

    软件程序及技巧(这部分重点推荐了 SHARC 处理器的一些外设单元的程序)

    PCG(外设时钟发生器)编程

    本部分主要讨论使用 PCG(精确时钟发生器)为 SHARC SPORT 提供时钟的注意事项。

    • 使用 PCG 产生的信号为 I 2 S 模式的 SPORT 提供 FS 和 SCLK 信号时,需要配置 PCG 的延迟寄存 器,使信号时序与 I 2 S 协议时序一致。LRCLK 信号必须由串行时钟的下降沿驱动。 „
    • 使用 PCG 为 TDM 模式的 SPORT 提供信号时,要求帧同步信号仅在一个串行…
  • TAGS LIST: Data Converters

    AD693
    AD5410
    AD5412
    AD5420
    AD5422
    AD5735
    AD5755
    AD5755-1
    AD5737
    AD5757
    AD5421
    AD421
    AD5758
    AD7569
    AD7669
    AD7868
    AD7869
    AD5593R
    AD5592R
    AD5940
    AD5941
    AD7293
    AD7294-2
    AD7292
    AD5590
    AD7294
    L…