• AD7606 offset problem on digital readouts

    I am using five AD7606 ADC's on a single data bus with appropriate CS signals from DSP.

    I encountered a weird situation with my custom board during tests. When I input 1V to any analog input, I measure approximately 1.25V on digital conversion side…

  • AD7606-4: No schematic is provided online or out of box for EVAL-AD7606-4EDZ

    I bought EVAL-AD7606-4EDZ and I want to use it standalone but no schematic is
    provided on ADI website or delevered with the evaluation board. I need the
    schematic in order to determine how to connect the evaluation board into my
    test circuit.

  • AD7606 Input bias voltage

    Hello colleagues!

    I have the issue with 1.8V bias on each channel of analog input of AD7606. Same question I see also in FAQ and in other topic of EngieerZone but unfortunately I don't see the answer there. Here is links:

     Ask a question about AD7…

  • AD7606 - grounding considerations

    Q: Are there special grounding considerations for the AD7606?

    A: At least one ground plane should be used. It can be common or split between the digital and analog sections. In the case of the split plane, the digital and analog ground planes should be…

  • AD7606 - powerup sequence

    Q: Is there a power-up sequence that I should follow in operating the AD7606?

    A: Page 11 of the AD7606 datasheet shows that VDRIVE is dependent on the AVCC so it is worth noting that the AVCC must be powered up before the VDRIVE.

  • AD7606 throughput rate

    The datasheet describes AD7606 as sampling at throughput rates up to 200
    kSPS for all channels. It is not clear if this means 200 ksps for each of the 8
    channels or if you
    need to divide the 200 ksps by 8.

     

    The core ADC inside the AD7606 is…

  • AD7606 - unipolar range configuration

    Q: The AD7606 can measure across +/-5V or +/-10V but I don’t really need to measure negative voltages. Can I configure the AD7606 to measure across the unipolar range and still get 16 bits resolution?

    A: The AD7606 is optimized for +/-5V and +/…

  • AD7606 evaluation board schematic

    the pin36 and pin 39 decoupling 10UF capacitor polarity is wrong in attached
    AD7606 evaluation board schematic

     

    Please see the attached for the latest released AD7606 tech note.

  • AD7606高位数据被锁定

    自制AD7606模块,通过FPGA控制,并行输出数据时,数据高位DB[9:15]均是高,数据位DB[8]始终为低,其余数据位DB[0:7]正常,导致输出数据始终为负数,请问这是什么问题导致的