When AD7484 works in dtandby mode,Can we turn off the analog power-AVDD ? and the AD7484 is powered only by DVDD supply?
I am working on a project and am using an AD7484 14bit SAR ADC. The device is running in connection with a FPGA, and later with a CPLD. In order to minimize the FPGA/CPLD design, I did not configure the 7484, i.e. I did not write any offset value…
What is the output drive capability of any output on the IC. We are using a number of the same ICs in our circuit on a common data bus. Unused devices are tristated. We need to know the drive capbility of the devices outputs so that we can estimate…
Can you tell me the minimum value of tconv for the AD7484 as it is not specified in table 2 of the datasheet?
On the AD7484 (as with many of our parts), the conversion time is clocked internally and we specify the maximum time that the conversion…
After reset of AD7484, when CONVST signal is given by single time, the BUSY is always low. But when it is given a continuous pulse to CONVST pin, it works well. I found out that the problem is the RESET signal provided for the chip is too short…
AD7484在进入STBY节电模式后AD的模拟电源AVDD可否断掉，只有DVDD接通供电？
Hi Yake,
I have attached a list of some of the ADCs that fit your criteria of 2MSPS sampling rate or higher at resolution of 12bits or more.
You may also wanted to check the ADI website and do a parametric search (http://www.analog.com/ps/psthandler…
Hello,
My name is Meir and I am DFAE at Phoenix technologies in Israel.
Satec, one of my customers is interested in ADC according to following requirements:
Resolution: 12Bits, 14Bits
Sampling rate: more than 2MS/S
Interface: Parallel
They shall…
Hi Postino,
Here are some list of ADC that could be suitable for your application. You may also wanted to check the ADI website and do a parametric search and put in parameters on the ADC that you wanted to search. Please refer to the link below.