• AD7484 Ouput drive capability

    What is the output drive capability of any output on the IC.  We are using a
    number of the same ICs in our circuit on a common data bus.  Unused devices are
    tristated.  We need to know the drive capbility of the devices outputs so that
    we can estimate…

  • AD7484 Minimum Conversion Time

    Can you tell me the minimum value of tconv for the AD7484 as it is not
    specified in table 2 of
    the datasheet?

     

    On the AD7484 (as with many of our parts), the conversion time is clocked
    internally and we specify the maximum time that the conversion…

  • AD7484: Width of Reset pulse

    After reset of AD7484, when  CONVST signal is given by single time, the BUSY is
    always low. But when it is given a continuous pulse to CONVST pin, it works
    well. I found out that the problem is the RESET signal  provided for the chip
    is too short…

  • I am working on a project and am using an AD7484 14bit SAR ADC. The device is running in connection with a FPGA, and later with a CPLD.

    I am working on a project and am using an AD7484 14bit SAR ADC.
    The device is running in connection with a FPGA, and later with a CPLD.

    In order to minimize the FPGA/CPLD design, I did not configure the 7484, i.e.
    I did not write any offset value…

  • AD7484 REFOUT

    1. How much current can I draw from the internal reference (REFOUT)? With REFSEL floating with a 0.1uF cap to AGND, REFOUT drops to 1.9V volts with a 4.7K load (0.5ma). Table 10 says the REFOUT impedance is 1 ohm.
    2. Fig 10 in the data sheet indicates…
  • AD7484在进入STBY节电模式后AD的模拟电源AVDD可否断掉,只有DVDD接通供电?

    AD7484在进入STBY节电模式后AD的模拟电源AVDD可否断掉,只有DVDD接通供电?

  • ADC 12/14BIT, >2mS/S, Parallel digital interface

    Hello,

    My name is Meir and I am DFAE at Phoenix technologies in Israel.

    Satec, one of my customers is interested in ADC according to following requirements:

    Resolution: 12Bits, 14Bits

    Sampling rate: more than 2MS/S

    Interface: Parallel

    They shall…