The AD7466 is designed to provide flexible power management. At CS rising edge or at the end of each conversion, the AD7466 automatically enter power down. At power down mode the analog circuitry is powered down.
On the next cycle, the falling…
How to find out the process technologies (CMOS IC processing) for the following ADCs:AD7466, AD7476, AD7170, AD7151 ?
I am planning to use AD7466 in my application and I have a question about the cs input.
In order to take data out of the ADC after conversion, the CS signal can be low the whole time to obtain different sets of data or do I need to alternate…
I am trying to convert a signal which on a DC offset. The offset is not so high that it will saturate to the DC rails. Do you anticipate any problems to this type of signal ? Will the ADC still do the conversion if it sees the signal levels change…
What sampling rate are you looking from the ADC?
What settling rate are you looking for from a DAC?
This will help narrow the portfolio options, but I can tell you that in precision ADCs ( up to 10Msps) the options are limited to the AD74…
Here are some list of ADC that could be suitable for your application. You may also wanted to check the ADI website and do a parametric search and put in parameters on the ADC that you wanted to search. Please refer to the link below.
A few questions about the clock input on this device.
1) is it OK to clock at a slower speed than 48 MHz? I only need to sample at about 200k SPS instead of 3M SPS and was having problems with glitches at higher clock speeds. Are there parameters within…