• AD7175-2

    AD7175-2的评估板连接PC后,电脑属性里已经显示了它的型号,但是无法选择word online 这个功能,一直有一个滚动条显示等到

  • AD7175-2

    一直都在用ADI的芯片

    目前项目里面用到AD7175-2(SigmadetlaADC)利用FPGA控制 请问其中CS管脚如果置高后时哦能干的事钟还在 影不影响读出数据的结果,我目前用的是单通道,时钟个数要求比较严格 但是目前程序没改通,只是刚好在cs低电平宽度内保证了正确的时钟个数 请问这样能不能正常使用啊   最后  请问你们ADI有没有控制AD7175-2的verilog语言啊 能不能共享你们的控制程序 谢谢@@@

  • AD7175-2 Unipolar Resolution

    Hi,

    I am looking to use the AD7175-2 with an external 5V reference to sample a unipolar differential signal (0 to 5V range); however I was concerned with possible resolution loss compared to bipolar operation (-2.5V to 2.5V range), as some of the other…

  • ad7175-2

    在调试AD7175-2时出现了问题(自己做的板子),通过SPI读取ID寄存器的值,总是得不到想要的0x0CDX结果。几块板子都是如此,不知道是哪地方的问题?

    板子原理图及PCB(四层板)图设计如下。经查:上电后,IOVDD(3.3V) AVDD(5V) REF(2.5V)REFOUT(2.5V),REGCAPA(1.8V),REGCAPD(1.8V)均正常。

    访问时序图如下图(上至下依次为CS,CLK,DOUT,DIN.DIN首先输入0x47来定位ID寄存器)

  • AD7175-2 digital interface check

    Q: I’m not sure if my digital interface is working on AD7175-2  – how can I check this?

    A: The ADC has a read-only ID register which will always read back as 0x0CDx.

  • AD7175-2 Eval Board Schematic

    I am working on a high precision, bipolar sensor design and the AD7175-2 is a candidate. It would be very helpful to our decision process, if we can receive the schematic for the Eval board.

    TIA,

    Yehuda

  • AD7175-2 Continuous Conversion mode

    Currently my design intention with FPGA is using below modes and selection:

    • Continuous mode at SPI read, CRC disabled
    • DATA_STAT enabling with reading back the appended data to DATAOUT at continuous read-back(this 8-bit status will be utilized…
  • AD7175-2 data conversion time

    Hello,
    I am designign a sensor board for a new application I am working on. The sensor will be an accelerometer driven at 2 kHz data rate, and I am looking for an ADC in order to drive it.
    Requirements:
    - at least 3 single ended channels (for the three…

  • AD7175-2 Evaluation Board原理图求助

    为了评估AD7175-2,购买了AD7175-2 Evaluation Board,但是没有发现板子原理图。不知道哪里可以得到板子的原理图呢

  • AD7175-2 CONTINUOUS CONVERSION MODE

    Refer to

    https://www.analog.com/media/en/technical-documentation/data-sheets/AD7175-2.pdf

    Currently my design intention with FPGA is using below modes and selection:

    • Continuous mode at SPI read, CRC disabled
    • DATA_STAT enabling with reading back the…