• AD7091R-8 Start up

    Hello All

    Please let me know your advice about start up sequence of AD7091R-8.

    I think that I set register setting  as attached file after power up.

    (write needed all register setting after default setting by reset pulse)

    Is my understanding correct…

  • RE: AD7091R-8  READING CONVERSION RESULT

    Thanks for the captures.

    Now, I think AD7091R-8 does not start conversion with the /CONVST pusles. The cause may be AD7091R-8 doesn't recognize the /CONVST or AD7091R-8 gets latch-up in some state.

    I saw the power supplies VDD=5V takes about 50ms…

  • AD7091R-8 ADC conversion result

    Hello AD,

    I'm working on AD7091R-8 evaluation board.

    Currently I have enabled 3 channels out of 8.

    I'm using the channel sequencer for reading the conversion results.

    When I'm  reading the conversion result of the enabled channels,I'm getting…

  • Ask a question about AD7091R-8

    Hi,

    As you know, the maximum throughput rate of AD7091R-8 is 1Msps.In the condition of all 8 channels enabled by internal sequencer, convert from channel 0 to channel 7 sequently, what’t the actual throughput rate? Is it still 1Msps or down to 1Msps/8…

  • AD7091R-8  Power-On initialization, CONVST reset not working

    Hello,

    I did send my question in this discussion:

    AD7091R-4 Malfunctioning 

    As we are having similar issue.  Basically initializing the ADC with 66 pulses of CONVST does not seem to work...

    I can provide all probing or logging if needed.

    Hope someone…

  • Are there ways to reduce the component count associated with a solution containing the      AD7091R-2/4/8?

    Yes, an excellent solution is to take advantage of the Mux Out / ADC In feature that allows for a buffer amplifier at the output of the multiplexer instead of the traditional solution that may require a buffer per channel.  The post-multiplexer buffer…

  • RE: is there any simulation model for AD7091R ? I want to use a FPGA to connect to AD7091R to get data

    Are there any plans for VHDL or Verilog behavioral models for this device in the near future?

  • RE: ad7091R

    EHILLEL820,

    You absolutely can read from channel 0 to channel 3 (1-4) in sequential order.   Assuming you are using the AD7091R-4, you can simply program the channel register (ADDR = 0x01) with code 0x000F to enable channels 0 to 3 for conversion.  

    If you…

  • RE: AD7091R-5 GPO1、2 Attributes

    Justin_322,

    GPO1 and GPO2 are CMOS (push/pull) type outputs.  Note that the GPO1 is only available in command or autocycle modes.  IN sample mode GPO1 is configured as the CNVST input which is CMOS as well.

    Sean

  • AD7091R-8BCPZ 1.8V operation

    Hi,

    I have connected VDRIVE of AD7091R-8 to a 1.8V supply.

     Does the chipset support such a voltage range??

    The Operating voltage specification does not mention the device to work below 1.8V so accuracy of supply voltage say 1.8V 5% will it affect the…