• Undesirable inharmonious distortions AD6679


    For a couple of months I'm testing the AD6679 ADC and there's a problem that can not be solved, maybe you'll help with this:

    In the spectrum of the digitized signal there are undesirable inharmonic distortions that depend on the frequency…

  • AD6679-500EBZ and ADS7-V2EBZ interconnection


    EVAL-6679 product page contains following sentence: "The ADS7-V2EBZ may alternatively be used as the FPGA based data capture board for the AD6679."

    When SPI Controller has run following error windows occur.

    I have seen Missing…

  • PCB files for AD6679-500EBZ


    Where can I find the PSB file for AD6679-500EBZ?

    Best Regards,

    Mikhail Vyugin

  • AD6679 outputs only 7 out of 14 bits


    I'm trying to reproduce the performance characteristics from the datasheet, but unfortunately get a much worse SNR (around 40dB) for a sine input.

    What I noticed: When running AD6679 in "Full Bandwidth Mode" (reg 0x220 = 0), the lower 7 data…

  • Missing device config files for AD6679 for SPIController and VisualAnalog

    I’m trying to get working the AD6679 500EBZ together with the ADS7-V2EBZ, but run into the following problems:

    I downloaded and installed SPIController_Setup.exe and VisualAnalog_Setup.exe.

    When I start SPI Controller, it asks for a device configuration…

  • FPGA program and EEPROM ID fails with ADS7-V2EBZ and AD6679

    Now with the newest version of SPI-Controller and VisualAnalog, the device config files are available,

    but I still can't get neither of the programs to work.

    SPI-Controller fails with the error "The FPGA needs to be programmed on ADS7V2 platform…

  • Whether AD6679 Can be used to down convert 1150 MHz RF signal with MSK Modulation.

    I am planning to use AD6679 RF ADC for down converting RF signal of 1150 MHz signal to base band. Signal Bandwidth is 16 MHZ. ADC support sampling rate between 250 Msps to 500 Msps Max. Whether I will be able to down convert the 1150Mhz to base band…

  • RE: AD9684 Byte Mode Problem

    Hi Igor,

    I am glad to hear you were able to get things moving and apologize for the delay in the original response. You are correct that the AD6679 and AD9680 are similar parts.  The AD6679 would be closer to the AD9684 but is not the same part as it…

  • ADC hardware timestamp in HDL and exposing iio timestamp channel

    I have a working ADC HDL design, to which I would like to add the ability to time-stamp samples in hardware.

    The output of the ADC core goes to a util_cpack module which packs IQ sample data from 4 channels. A 64bit hardware timestamp IP core module is…

  • AD 9684 missing configuration

    HI ,

    I am working with AD9684 and I want to configure it with an NCO of 70 MHz and decimation ratio of 4 with two channel input. Input is real at 250 MSPS and carrier of 70 MHz, I want to down convert the signal to IQ ( complex ) baseband ( 0 MHz…