• AD6676 FAQ: Why isn't the noise floor of the AD6676 flat?

    I am looking at the noise spectral density (NSD) plots shown in NOMINAL PERFORMANCE characteristics of the datasheet and noticed that they are not flat and can vary depending on the AD6676 configuration.  Why?


    The AD6676 includes a tunable continuous…

  • AD6676 HDL GT REF CLK query

    Hi Sir/Madam,

    We are planning to use AD6676 IC in our design and we will be using HDL provided by Analog device for our design. Regarding that we have few queries that i have listed below.

    We are taking AD6676EBZ as reference for our design what we have…

  • Power Supply Filtering For AD6676

    Hello, Can you please Confirm the power supply filtering Design For AD6676 

  • AD6676 : Maximum Input Power (PIN_0dBFS) calculation


    PIN_0dBFS = 10 × log10(1/2 × RIN × (IDAC1FS)^2) is the formula mentioned.

    In the datasheet it is mentioned "the AD6676 nominal setting for IDAC1FS at 4 mA equates to a PIN_0dBFS of −3 dBm, resulting in a differential voltage swing…


    Inquiry Description:
    1)If EVAL-AD6676 operates with Clock synthesizer Disabled and Clock source originating from On Board Oscillator, Then from Where "sysref" is generated?
    In the Eval Board schematic, by default, it comes from an External FMC…

  • AD6676 BOOT.bin


    I've installed the AD6676_installer_offline.exe GUI and downloaded the BOOT.bin for ZC706 from the FMCOMMS3 section.

    When i'm trying to connect the GUI,  it's not connecting. And I've installed one more GUI - IIO oscilloscope and it's working…

  • AD6676 FAQ: Why are the performance specifications of the AD6676 different than the ones used to specify a typical ADC?

    I am familiar with typical ADC ac performance specifications such as SNR, SINAD, THD, SFDR, and ENOB when comparing ADC’s with each other. The AD6676 uses different specifications to quantify its ac performance characteristics. Why?

    Since the AD6676…

  • AD6676, problem with axi_dmac_transfer()


    I'm working on AD6676 and ZC760 Eval boards. And I'm using no-os  & hdl 2019_R2 versions. We have downloaded the no-os & hdl files from the Analog devices.

    My requirement is to capture the ADC data using DMA. For that we are giving…

  • AD6676 power consumption at 2G sampling clock


    • ADC Configuration:
      • sampling clock of 2GHz.
      • x12 decimation is used.
      • dual lane JESD204B.
      • internal clock synthesizer disabled.
    1. With the above mentioned configuration what is the approximate current consumption? (Compared to 3.2GHz sampling clock…