• AD6645


    I use AD6645 evaluation board which has 105 MHz cyrstal to sample analog signal. I send sampled signal to a computer and plot that. The signal below which is at 200 KHz is sampled by AD6645 . The sine wave is generated by Agilent waveform generator…

  • AD6645: Overvoltage protection

    As we drive the AD6645 with a differential amplifier (AD8138), the question
    comes up if it is necessary to protect the AD6645 from negative voltages at its
    analog input. When supplying the op amp with a +/- supply voltage, the output
  • AD6645 overshoot

    We design a data acquisition system and noticed an overshoot with a ~3us time constant in the ADC data. It is a small effect but it biases our data quality. I spent some time in identifying the source of the time constant.

    The source of the time constant…

  • AD6645: Spurious noise

    The problem is related to the A/D converter AD6645 which we use together with
    the AD8351 as preamplifier. The diagram of the input circuit can be provided.
    The signal is then routed to the downconverter AD6634. We use the filters of
  • AD6645: Max input signal

    please can you tell me how the AD6645 will cope with a continuous sin wave
    signal applied between the Full scale maximum and the absolute maximum input
    rating of the device. We have an error mode where this may occur and I would
  • AD6645  evaluation board


    I have purchased AD6645 evaluation board and trying to get data from it,

    I want to ask some questions. The board is equipped according to the AC coupled analog input configuration. Should I terminate the analog input SMA connection by R2=50 or…

  • AD6645: Selection of resistor values

    In the EVM you use two banks of resistor before and after the latches. Does the
    board work with values between 33 and 47 ohm for RN1 and RN3?


    The board will be functional with all values of resistors up to the 470ohms.
    The higher resistance…
  • AD6645: Interfacing to a FPGA

    We intend to use AD6645-105 FADCs running at 100MHz driving into a Xilinx
    Virtex II Pro chip. (7 FADCs into one chip). In the AD data sheet there is a
    test board diagram which uses a 74LCX574 chip to latch the data output from the
  • AD6645锁存输出



  • AD6645 OVR总为高

    大家好, 最近我设计了一版 AD6645+FPGA的采集电路

    以下是 AD6645前端部分

    经过测量, AD8138 正电压为5.1V, 负电压为 -4.5V (负电压由LM2662产生)

    AD6645的采样差分时钟 enc 由 FPGA的 差分管脚输出 进行驱动。 同时 FPGA通过AD DRY信号的上升沿进行数据采集并传输。


    图中R19 甩空,不接任何信号,AD采样结果 是  8191 , OVR=1