I have a question regarding the AD6644 converter. Is it possible to use it with a clock whose frequency varies? Can the device work under this operating condition and what would the max conversion rate be?
I am available for a private discussion…
AD6644-45 does not have SPI control pins. Is it enough Tto sample data when ENCODE is LOW and DRY is HIGH as stated in my second reply ?
Hi Mr. Larry -
Thank you very much for your reply .
Can I directly connect the FPGA clock signal output which is 6.6V pk-pk 1.75 Vmean 16 MHz square wave signal ? In the 4th page of AD6644 datasheet it is ENCODE inputs are 0.4V pk-pk differential input…
Good morning. I have a customer inquiring as to how low the freqeuncy of a signal can be to drive the analog inputs of the AD9214-105 and the AD6644-65. He needs to be able to accommodate some signals that will be in the range from 50KHz - 100KHz.
Hi Mr. Larry Welchusa
Thank you very much for your help
I attached the schematic pdf file. I can also send the layout files' pictures.
In addition to the schematic i have made two differences in the layout. The first one is adding two capacitors…
Hi everybody ,
I have created my own DAQ board using AD6644 and AD9764 as indicated in their evaluation boards' document.
I want to ask some questions :
1) The Vref supply does not source current after the AVCC is connected is it OK ?
2) Is there…