• RE: AD6636 BIST module testing, how to configure register

    Hi,

    The legacy AD6636 was released some 13yrs ago and has been on the "not recommended for new designs list" for many years. Due to this ADI support is primarily limited to continuing to source the legacy AD6636 components for existing legacy customer…

  • RE: 请问AD6636有仿真软件么

    AD6636没有仿真软件,只有IBIS模型

  • RE: power calculations -  AD6636

    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
  • DDC roadmap AD6636

    I designed and produced last years a software defined radio and usb
    data-acqusition-cards with the digital downconverter AD6636CBCZ. Now i see on
    the website the AD6636 Status: Not Recommended for new design.
    My question: is there a new…
  • Parasitic spectral component AD6636

    In case of chip utilization of AD6636 there was the following problem:
    at a zero spectral bin there is always a parasitic spectral component of which existence it is possible to get rid changing values of the register CIC scale factor. But at the same…

  • RE: Pin-SYNC with DDC?

    Hi Dave,

    When the AD6636 was initially released it may have had an edge over an FPGA in terms of power/function, but FPGAs are continually evolving to smaller process geometries which leads to lower power.  So I expect today's FPGAs would likely come…

  • RE: PN sequence for ADC & DDC ?

    Hi David-

    I moved this question regarding the AD6636 and AD9251 to the High-Speed ADCs Community.  Someone here should be able to assist you.

    Regards,

    Andy

  • AD6636: multiple channel Filter design

    As AD6636_multiple channel Filter design.docx shown, it describe how to combine
    the filtering resources of multiple channels. And here two channels' example is
    given.
    1. For the RCF filter of one channel, I think we can use Softcell…
  • AD6636 BIST模块测试如何设置寄存器

    通过FPGA进行并口的时序控制,寄存器已经成功读写,官方文档上BIST相关寄存器 BIST Control设置使能,并将计时器赋值,输入和通道寄存器也设置,直接读取BIST I/Q Path Signature Register后的值还是默认值6636,不是应该产生一个随机数吗?有哪位大神指点一下想使用这个模块该怎样设置寄存器啊?

  • DDC All-bypass real output ?

    There is insufficiant information in the AD6636 DDC datasheet to interrpret what output should be produced when all filter and NCO elements are set to "bypassed" mode. My goal is to see the RAW ADC input to this chip being passed through to the output…